X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fqemu-arm.h;h=0431a7982d1420183b4f156f3913ff68abe96659;hb=29d280c88a1ff331dce2d4c7a5aaf2402aa0fd8a;hp=4376a247876706e535c2e6aa572d3678e08e16d1;hpb=26f9184e094541b672f83f23652e2e737d5d0729;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/qemu-arm.h b/include/configs/qemu-arm.h
index 4376a24..0431a79 100644
--- a/include/configs/qemu-arm.h
+++ b/include/configs/qemu-arm.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (c) 2017 Tuomas Tynkkynen
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -10,9 +9,7 @@
 #include <linux/sizes.h>
 
 /* Physical memory map */
-#define CONFIG_SYS_TEXT_BASE		0x00000000
 
-#define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_SDRAM_BASE		0x40000000
 
 /* The DTB generated by QEMU is placed at start of RAM, stay away from there */
@@ -20,27 +17,17 @@
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + SZ_2M)
 #define CONFIG_SYS_MALLOC_LEN		SZ_16M
 
-/* QEMU's PL011 serial port is detected via FDT using the device model */
-#define CONFIG_PL01X_SERIAL
-
-/* QEMU implements a 62.5MHz architected timer */
-/* FIXME: can we rely on CNTFREQ instead of hardcoding this fact here? */
-#define CONFIG_SYS_ARCH_TIMER
+/* For timer, QEMU emulates an ARMv7/ARMv8 architected timer */
 #define CONFIG_SYS_HZ                       1000
-#define CONFIG_SYS_HZ_CLOCK                 62500000
-
-/* For block devices, QEMU emulates an ICH9 AHCI controller over PCI */
-#define CONFIG_SYS_SCSI_MAX_SCSI_ID 6
-#define CONFIG_SCSI_AHCI
-#define CONFIG_LIBATA
 
 /* Environment options */
-#define CONFIG_ENV_SIZE				SZ_64K
-
-#include <config_distro_defaults.h>
+#define CONFIG_ENV_ADDR			0x4000000
+#define CONFIG_ENV_SIZE			SZ_256K
 
 #define BOOT_TARGET_DEVICES(func) \
-	func(SCSI, scsi, 0)
+	func(SCSI, scsi, 0) \
+	func(VIRTIO, virtio, 0) \
+	func(DHCP, dhcp, na)
 
 #include <config_distro_bootcmd.h>
 
@@ -55,4 +42,11 @@
 	"ramdisk_addr_r=0x44000000\0" \
 	BOOTENV
 
+#define CONFIG_SYS_CBSIZE 512
+
+#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_FLASH_BASE		0x0
+#define CONFIG_SYS_MAX_FLASH_BANKS	2
+#define CONFIG_SYS_MAX_FLASH_SECT	256 /* Sector: 256K, Bank: 64M */
+
 #endif /* __CONFIG_H */