X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fpico-imx8mq.h;h=d1cc1b9d63fb08ed4f41137fb0bb6b5b5ae7aee0;hb=c45568cc4e51b7bbe2f3ce28d8f2566048aeebf3;hp=2293a2919e28a89c6c13c70cb2f57a13668e8edd;hpb=111a8b57354bb5aff55635502a0cdf74cb63e835;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h
index 2293a29..d1cc1b9 100644
--- a/include/configs/pico-imx8mq.h
+++ b/include/configs/pico-imx8mq.h
@@ -9,38 +9,21 @@
 #include <linux/sizes.h>
 #include <asm/arch/imx-regs.h>
 
-#define CONFIG_SPL_MAX_SIZE		(124 * 1024)
 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
 
 #ifdef CONFIG_SPL_BUILD
 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
-#define CONFIG_SPL_STACK		0x187FF0
-#define CONFIG_SPL_BSS_START_ADDR	0x00180000
-#define CONFIG_SPL_BSS_MAX_SIZE		0x2000	/* 8 KB */
-#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000	/* 512 KB */
 #define CONFIG_SYS_SPL_PTE_RAM_BASE	0x41580000
 
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_MALLOC_F_ADDR		0x182000
 /* For RAW image gives a error info not panic */
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
-
-#undef CONFIG_DM_MMC
 #endif
 
-#define CONFIG_REMAKE_ELF
-
 /* ENET Config */
 /* ENET1 */
 #if defined(CONFIG_CMD_NET)
-#define CONFIG_ETHPRIME			"FEC"
-
-#define CONFIG_FEC_XCV_TYPE		RGMII
 #define CONFIG_FEC_MXC_PHYADDR		1
-#define FEC_QUIRK_ENET_MAC
-
-#define IMX_FEC_BASE			0x30BE0000
 #endif
 
 /* Initial environment variables */
@@ -55,7 +38,7 @@
 	"initrd_high=0xffffffffffffffff\0"				\
 	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0"		\
 	"mmcpart=1\0"	\
-	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0"			\
+	"mmcroot=/dev/mmcblk1p2 rootwait rw\0"			\
 	"mmcautodetect=yes\0"						\
 	"mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 "	\
 	"loadbootscript="						\
@@ -84,29 +67,15 @@
 
 #define CONFIG_SYS_INIT_RAM_ADDR	0x40000000
 #define CONFIG_SYS_INIT_RAM_SIZE	0x80000
-#define CONFIG_SYS_INIT_SP_OFFSET	\
-	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR		\
-	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT			"/dev/mmcblk1p2"	/* USDHC2 */
 
 #define CONFIG_SYS_SDRAM_BASE		0x40000000
 #define PHYS_SDRAM			0x40000000
 #define PHYS_SDRAM_SIZE			0x80000000	/* 2 GiB DDR */
 
-#define CONFIG_MXC_UART_BASE		UART1_BASE_ADDR
-
-/* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE		1024
-#define CONFIG_SYS_MAXARGS		64
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
-					sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_MXC_UART_BASE		UART_BASE_ADDR(1)
 
 #define CONFIG_SYS_FSL_USDHC_NUM	2
 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
 
-#define CONFIG_SYS_BOOTM_LEN		SZ_128M
-
 #endif