X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fpg-wcom-expu1.h;h=2c38cffa8a0930048777cb6ee6a837777113c0e5;hb=605bc145f91d2a28ba2e517cae4e53e255e34b6f;hp=e08d941412970a357c7e3c0dff6f4a9d8f044572;hpb=90c2fd2af8189e2e2682c90cd72a48b65191b467;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/pg-wcom-expu1.h b/include/configs/pg-wcom-expu1.h
index e08d941..2c38cff 100644
--- a/include/configs/pg-wcom-expu1.h
+++ b/include/configs/pg-wcom-expu1.h
@@ -7,29 +7,25 @@
 #define __CONFIG_PG_WCOM_EXPU1_H
 
 #define WCOM_EXPU1
-#define CONFIG_HOSTNAME				"EXPU1"
-
-#define CONFIG_KM_UBI_PARTITION_NAME_BOOT	"ubi0"
-#define CONFIG_KM_UBI_PARTITION_NAME_APP	"ubi1"
 
 /* CLIPS FPGA Definitions */
-#define CONFIG_SYS_CSPR3_EXT	(0x00)
-#define CONFIG_SYS_CSPR3	(CSPR_PHYS_ADDR(CONFIG_SYS_CLIPS_BASE) | \
+#define CFG_SYS_CSPR3_EXT	(0x00)
+#define CFG_SYS_CSPR3	(CSPR_PHYS_ADDR(CONFIG_SYS_CLIPS_BASE) | \
 				CSPR_PORT_SIZE_8 | \
 				CSPR_MSEL_GPCM | \
 				CSPR_V)
-#define CONFIG_SYS_AMASK3	IFC_AMASK(64 * 1024)
-#define CONFIG_SYS_CSOR3	(CSOR_GPCM_ADM_SHIFT(0x4) | \
+#define CFG_SYS_AMASK3	IFC_AMASK(64 * 1024)
+#define CFG_SYS_CSOR3	(CSOR_GPCM_ADM_SHIFT(0x4) | \
 				CSOR_GPCM_TRHZ_40)
-#define CONFIG_SYS_CS3_FTIM0	(FTIM0_GPCM_TACSE(0x6) | \
+#define CFG_SYS_CS3_FTIM0	(FTIM0_GPCM_TACSE(0x6) | \
 				FTIM0_GPCM_TEADC(0x7) | \
 				FTIM0_GPCM_TEAHC(0x2))
-#define CONFIG_SYS_CS3_FTIM1	(FTIM1_GPCM_TACO(0x2) | \
+#define CFG_SYS_CS3_FTIM1	(FTIM1_GPCM_TACO(0x2) | \
 				FTIM1_GPCM_TRAD(0x12))
-#define CONFIG_SYS_CS3_FTIM2	(FTIM2_GPCM_TCS(0x3) | \
+#define CFG_SYS_CS3_FTIM2	(FTIM2_GPCM_TCS(0x3) | \
 				FTIM2_GPCM_TCH(0x1) | \
 				FTIM2_GPCM_TWP(0x12))
-#define CONFIG_SYS_CS3_FTIM3	0x04000000
+#define CFG_SYS_CS3_FTIM3	0x04000000
 
 /* PRST */
 #define WCOM_CLIPS_RST		0