X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fpcm058.h;h=b0415b28adeb12507787aa4cb18a61bc918091d8;hb=504bf790da08db9b4a443566cf6ef577f9c7996a;hp=2c1221d0854fc772fba4ec13fc582049d3854fb9;hpb=1f032ce23ac8e789b716645dc9fd8392787add20;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/pcm058.h b/include/configs/pcm058.h index 2c1221d..b0415b2 100644 --- a/include/configs/pcm058.h +++ b/include/configs/pcm058.h @@ -1,17 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (C) Stefano Babic - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __PCM058_CONFIG_H #define __PCM058_CONFIG_H -#include - #ifdef CONFIG_SPL -#define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) #include "imx6_spl.h" #endif @@ -29,7 +25,6 @@ #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) /* Early setup */ -#define CONFIG_DISPLAY_BOARDINFO_LATE /* Size of malloc() pool */ @@ -37,18 +32,12 @@ /* Ethernet */ #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 3 /* SPI Flash */ -#define CONFIG_MXC_SPI -#define CONFIG_SF_DEFAULT_BUS 0 -#define CONFIG_SF_DEFAULT_CS 0 -#define CONFIG_SF_DEFAULT_SPEED 20000000 -#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 /* I2C Configs */ #define CONFIG_SYS_I2C @@ -58,26 +47,18 @@ #ifndef CONFIG_SPL_BUILD /* Enable NAND support */ -#define CONFIG_NAND_MXS #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_ONFI_DETECTION +#define CONFIG_SYS_NAND_USE_FLASH_BBT #endif /* DMA stuff, needed for GPMI/MXS NAND support */ -#define CONFIG_APBH_DMA -#define CONFIG_APBH_DMA_BURST -#define CONFIG_APBH_DMA_BURST8 /* Filesystem support */ -#define CONFIG_MTD_PARTITIONS -#define CONFIG_MTD_DEVICE -#define MTDIDS_DEFAULT "nand0=nand" -#define MTDPARTS_DEFAULT "mtdparts=nand:16m(uboot),1m(env),-(rootfs)" /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM @@ -97,10 +78,6 @@ #define CONFIG_ENV_SIZE (16 * 1024) #define CONFIG_ENV_OFFSET (1024 * SZ_1K) #define CONFIG_ENV_SECT_SIZE (64 * SZ_1K) -#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS -#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS -#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE -#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED #define CONFIG_SYS_REDUNDAND_ENVIRONMENT #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ CONFIG_ENV_SECT_SIZE)