X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fpcm052.h;h=72f8d08a665c8fcd4aa60d47447012e36e28bd8d;hb=6d7dacf726ca043a3f5487549bbfa506c990c813;hp=3963efd1dd9ff7c370a4efe5e7717708770eb2a5;hpb=c27269953b94d19b3fc7a21a1c3e19985507b94d;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h index 3963efd..72f8d08 100644 --- a/include/configs/pcm052.h +++ b/include/configs/pcm052.h @@ -1,19 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2013 Freescale Semiconductor, Inc. * * Configuration settings for the phytec PCM-052 SoM. - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H #define __CONFIG_H #include - -#define CONFIG_VF610 - -#define CONFIG_SYS_THUMB_BUILD +#include #define CONFIG_SKIP_LOWLEVEL_INIT @@ -21,101 +17,27 @@ #define CONFIG_CMDLINE_TAG /* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) - -#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * SZ_1M) /* Allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE -#define CONFIG_BAUDRATE 115200 /* NAND support */ -#define CONFIG_CMD_NAND -#define CONFIG_CMD_NAND_TRIMFFS #define CONFIG_SYS_NAND_ONFI_DETECTION -#ifdef CONFIG_CMD_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR - -#define CONFIG_JFFS2_NAND - -/* UBI */ -#define CONFIG_CMD_UBIFS -#define CONFIG_RBTREE -#define CONFIG_LZO - -/* Dynamic MTD partition support */ -#define CONFIG_CMD_MTDPARTS -#define CONFIG_MTD_PARTITIONS -#define CONFIG_MTD_DEVICE - -#ifndef MTDIDS_DEFAULT -#define MTDIDS_DEFAULT "nand0=NAND" -#endif - -#ifndef MTDPARTS_DEFAULT -#define MTDPARTS_DEFAULT "mtdparts=NAND:640k(bootloader)"\ - ",128k(env1)"\ - ",128k(env2)"\ - ",128k(dtb)"\ - ",6144k(kernel)"\ - ",-(root)" -#endif - -#endif - -#define CONFIG_FSL_ESDHC -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_ESDHC_NUM 1 - -/*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/ -#define CONFIG_SYS_FSL_ERRATUM_ESDHC135 -#define CONFIG_SYS_FSL_ERRATUM_ESDHC111 -#define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001 - -#define CONFIG_GENERIC_MMC -#define CONFIG_DOS_PARTITION - -#define CONFIG_FEC_MXC -#define CONFIG_MII -#define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE RMII -#define CONFIG_FEC_MXC_PHYADDR 0 -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL - /* QSPI Configs*/ - #ifdef CONFIG_FSL_QSPI -#define FSL_QSPI_FLASH_SIZE (1 << 24) +#define FSL_QSPI_FLASH_SIZE (SZ_16M) #define FSL_QSPI_FLASH_NUM 2 #define CONFIG_SYS_FSL_QSPI_LE #endif -/* I2C Configs */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC_I2C3 -#define CONFIG_SYS_I2C_MXC - -/* RTC (actually an RV-4162 but M41T62-compatible) */ -#define CONFIG_CMD_DATE -#define CONFIG_RTC_M41T62 -#define CONFIG_SYS_I2C_RTC_ADDR 0x68 -#define CONFIG_SYS_RTC_BUS_NUM 2 - -/* EEPROM (24FC256) */ -#define CONFIG_CMD_EEPROM -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 -#define CONFIG_SYS_I2C_EEPROM_BUS 2 - #define CONFIG_LOADADDR 0x82000000 /* We boot from the gfxRAM area of the OCRAM. */ -#define CONFIG_SYS_TEXT_BASE 0x3f408000 -#define CONFIG_BOARD_SIZE_LIMIT 524288 +#define CONFIG_BOARD_SIZE_LIMIT 520192 /* if no target-specific extra environment settings were defined by the target, define an empty one */ @@ -158,7 +80,7 @@ "nfs_root=/path/to/nfs/root\0" \ "tftptimeout=1000\0" \ "tftptimeoutcountmax=1000000\0" \ - "mtdparts=" MTDPARTS_DEFAULT "\0" \ + "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "bootargs_base=setenv bootargs rw " \ " mem=" __stringify(CONFIG_PCM052_DDR_SIZE) "M " \ "console=ttyLP1,115200n8\0" \ @@ -225,30 +147,15 @@ "nand write ${ram_addr} root ${filesize}; fi\0" /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE \ - (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_MEMTEST_START 0x80010000 #define CONFIG_SYS_MEMTEST_END 0x87C00000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -/* - * Stack sizes - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ - /* Physical memory map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM (0x80000000) -#define PHYS_SDRAM_SIZE (CONFIG_PCM052_DDR_SIZE * 1024 * 1024) +#define PHYS_SDRAM_SIZE (CONFIG_PCM052_DDR_SIZE * SZ_1M) #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR @@ -259,22 +166,9 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) -/* FLASH and environment organization */ -#define CONFIG_SYS_NO_FLASH - +/* environment organization */ #ifdef CONFIG_ENV_IS_IN_MMC -#define CONFIG_ENV_SIZE (8 * 1024) - -#define CONFIG_ENV_OFFSET (12 * 64 * 1024) #define CONFIG_SYS_MMC_ENV_DEV 0 #endif -#ifdef CONFIG_ENV_IS_IN_NAND -#define CONFIG_ENV_SECT_SIZE (128 * 1024) -#define CONFIG_ENV_SIZE (8 * 1024) -#define CONFIG_ENV_OFFSET 0xA0000 -#define CONFIG_ENV_SIZE_REDUND (8 * 1024) -#define CONFIG_ENV_OFFSET_REDUND 0xC0000 -#endif - #endif