X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fp1_twr.h;h=1e0708a71bdabc7bec402a10d4b962cb8a720d22;hb=bdf97b5d393fc94666a847e9bac1c358b2c63c59;hp=cd0fc3d39ee7bd4a1d12c2b24425d8c6d91bc15b;hpb=432e39806805c46d583e75e8dd2f7b71cc6089c1;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h index cd0fc3d..1e0708a 100644 --- a/include/configs/p1_twr.h +++ b/include/configs/p1_twr.h @@ -1,7 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2013 Freescale Semiconductor, Inc. - * - * SPDX-License-Identifier: GPL-2.0+ */ /* @@ -13,7 +12,6 @@ #if defined(CONFIG_TWR_P1025) #define CONFIG_BOARDNAME "TWR-P1025" #define CONFIG_PHY_ATHEROS -#define CONFIG_QE #define CONFIG_SYS_LBC_LBCR 0x00080000 /* Conversion of LBC addr */ #define CONFIG_SYS_LBC_LCRR 0x80000002 /* LB clock ratio reg */ #endif @@ -21,15 +19,9 @@ #ifdef CONFIG_SDCARD #define CONFIG_RAMBOOT_SDCARD #define CONFIG_SYS_RAMBOOT -#define CONFIG_SYS_EXTRA_ENV_RELOC -#define CONFIG_SYS_TEXT_BASE 0x11000000 #define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc #endif -#ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff40000 -#endif - #ifndef CONFIG_RESET_VECTOR_ADDRESS #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif @@ -38,21 +30,15 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #endif -#define CONFIG_MP - #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ -#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ -#define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE -#define CONFIG_SATA_SIL3114 #define CONFIG_SYS_SATA_MAX_DEVICE 2 -#define CONFIG_LIBATA #define CONFIG_LBA48 #ifndef __ASSEMBLY__ @@ -71,7 +57,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x1fffffff -#define CONFIG_PANIC_HANG /* do not reset board on panic */ #define CONFIG_SYS_CCSRBAR 0xffe00000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR @@ -169,12 +154,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE - -#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */ #define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 @@ -199,7 +179,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); * open - index 2 * shorted - index 1 */ -#define CONFIG_CONS_INDEX 1 #undef CONFIG_SERIAL_SOFTWARE_FIFO #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 @@ -233,11 +212,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 -/* - * eSPI - Enhanced SPI - */ -#define CONFIG_HARD_SPI - #if defined(CONFIG_PCI) /* * General PCI @@ -271,7 +245,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #if defined(CONFIG_TSEC_ENET) -#define CONFIG_MII /* MII PHY management */ #define CONFIG_TSEC1 #define CONFIG_TSEC1_NAME "eTSEC1" #undef CONFIG_TSEC2 @@ -300,7 +273,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #ifdef CONFIG_QE /* QE microcode/firmware address */ -#define CONFIG_SYS_QE_FMAN_FW_IN_NOR #define CONFIG_SYS_QE_FW_ADDR 0xefec0000 #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #endif /* CONFIG_QE */ @@ -344,13 +316,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* * Dynamic MTD Partition support with mtdparts */ -#define CONFIG_MTD_DEVICE -#define CONFIG_MTD_PARTITIONS -#define CONFIG_FLASH_CFI_MTD -#define MTDIDS_DEFAULT "nor0=ec000000.nor" -#define MTDPARTS_DEFAULT "mtdparts=ec000000.nor:256k(vsc7385-firmware)," \ - "256k(dtb),5632k(kernel),57856k(fs)," \ - "256k(qe-ucode-firmware),1280k(u-boot)" /* * Environment @@ -385,7 +350,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #endif #ifdef CONFIG_MMC -#define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #endif @@ -394,11 +358,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */ /* * For booting Linux, the board info and command line data @@ -411,7 +371,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* * Environment Configuration */ -#define CONFIG_HOSTNAME unknown +#define CONFIG_HOSTNAME "unknown" #define CONFIG_ROOTPATH "/opt/nfsroot" #define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */