X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fomapl138_lcdk.h;h=1c41e7e97adc53d3997dd09e3f61c0e8f685df4d;hb=e4b91f085d4259f187052ff724c80af38fc11b18;hp=837286bd784f014e52c027ea88df2041c5276f83;hpb=0bb430c8494e26e8d258cf6957cdd39d2ce4f309;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 837286b..1c41e7e 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -1,11 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ * * Based on davinci_dvevm.h. Original Copyrights follow: * * Copyright (C) 2007 Sergey Kubushyn - * - * SPDX-License-Identifier: GPL-2.0 */ #ifndef __CONFIG_H @@ -14,16 +13,11 @@ /* * Board */ -#define CONFIG_DRIVER_TI_EMAC -#undef CONFIG_USE_SPIFLASH -#undef CONFIG_SYS_USE_NOR -#define CONFIG_USE_NAND /* * SoC Configuration */ #define CONFIG_MACH_OMAPL138_LCDK -#define CONFIG_ARM926EJS /* arm926ejs CPU core */ #define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) #define CONFIG_SYS_OSCIN_FREQ 24000000 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE @@ -39,14 +33,15 @@ #define PHYS_SDRAM_1_SIZE (128 << 20) /* SDRAM size 128MB */ #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ +#define CONFIG_SPL_BSS_START_ADDR DAVINCI_DDR_EMIF_DATA_BASE +#define CONFIG_SPL_BSS_MAX_SIZE 0x1080000 + /* memtest start addr */ #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000) /* memtest will be run on 16MB */ #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024) -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ - #define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \ DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \ DAVINCI_SYSCFG_SUSPSRC_SPI1 | \ @@ -58,7 +53,8 @@ * PLL configuration */ -#define CONFIG_SYS_DA850_PLL0_PLLM 37 +/* Requires CONFIG_SYS_DA850_PLL0_POSTDIV=0, set in Kconfig */ +#define CONFIG_SYS_DA850_PLL0_PLLM 18 #define CONFIG_SYS_DA850_PLL1_PLLM 21 /* @@ -105,30 +101,14 @@ /* * Serial Driver info */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */ -#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */ #define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) -#define CONFIG_CONS_INDEX 1 /* use UART0 for console */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } -#define CONFIG_SPI #define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) -#define CONFIG_SF_DEFAULT_SPEED 30000000 -#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED - -#ifdef CONFIG_USE_SPIFLASH -#define CONFIG_SPL_SPI_LOAD -#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 -#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x30000 -#endif /* * I2C Configuration */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_DAVINCI #define CONFIG_SYS_DAVINCI_I2C_SPEED 25000 #define CONFIG_SYS_DAVINCI_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ #define CONFIG_SYS_I2C_EXPANDER_ADDR 0x20 @@ -136,11 +116,9 @@ /* * Flash & Environment */ -#ifdef CONFIG_USE_NAND -#define CONFIG_NAND_DAVINCI +#ifdef CONFIG_NAND #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ #define CONFIG_ENV_SIZE (128 << 9) -#define CONFIG_SYS_NAND_USE_FLASH_BBT #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST #define CONFIG_SYS_NAND_PAGE_2K #define CONFIG_SYS_NAND_CS 3 @@ -177,32 +155,10 @@ #define CONFIG_SPL_NAND_LOAD #endif -#ifdef CONFIG_SYS_USE_NOR -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_PROTECTION -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ -#define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */ -#define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ * 3) -#define CONFIG_ENV_SIZE (128 << 10) -#define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE -#define PHYS_FLASH_SIZE (8 << 20) /* Flash size 8MB */ -#define CONFIG_SYS_MAX_FLASH_SECT ((PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ)\ - + 3) -#define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ -#endif - -#ifdef CONFIG_USE_SPIFLASH -#define CONFIG_ENV_SIZE (64 << 10) -#define CONFIG_ENV_OFFSET (256 << 10) -#define CONFIG_ENV_SECT_SIZE (64 << 10) -#endif - /* * Network & Ethernet Configuration */ #ifdef CONFIG_DRIVER_TI_EMAC -#define CONFIG_MII #undef CONFIG_DRIVER_TI_EMAC_USE_RMII #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_DNS2 @@ -213,12 +169,16 @@ /* * U-Boot general configuration */ -#define CONFIG_MISC_INIT_R #define CONFIG_BOOTFILE "zImage" /* Boot file name */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ #define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) -#define CONFIG_MX_CYCLIC + +/* + * USB Configs + */ +#define CONFIG_USB_OHCI_NEW +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 /* * Linux Information @@ -253,20 +213,6 @@ #define CONFIG_CLOCKS #endif -#ifndef CONFIG_DRIVER_TI_EMAC -#endif - -#ifdef CONFIG_USE_NAND -#define CONFIG_MTD_DEVICE -#define CONFIG_MTD_PARTITIONS -#endif - -#if !defined(CONFIG_USE_NAND) && \ - !defined(CONFIG_SYS_USE_NOR) && \ - !defined(CONFIG_USE_SPIFLASH) -#define CONFIG_ENV_SIZE (16 << 10) -#endif - /* SD/MMC */ #ifdef CONFIG_ENV_IS_IN_MMC @@ -276,16 +222,13 @@ #define CONFIG_ENV_OFFSET (51 << 9) /* Sector 51 */ #endif -#ifndef CONFIG_DIRECT_NOR_BOOT /* defines for SPL */ #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ CONFIG_SYS_MALLOC_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN #define CONFIG_SPL_STACK 0x8001ff00 -#define CONFIG_SPL_TEXT_BASE 0x80000000 #define CONFIG_SPL_MAX_FOOTPRINT 32768 #define CONFIG_SPL_PAD_TO 32768 -#endif /* additions for new relocation code, must added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0xc0000000