X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fomap3_sdp3430.h;h=55bbcd4e5fb4c775baa37e5f838155677a607e70;hb=2cc195e0a5690bf022631ae420767e5b91c37476;hp=229dc5e644144128477bf739daa292b7b1b49951;hpb=e63e5904b48528f3f3cc98317df6fc62fab25bf9;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/omap3_sdp3430.h b/include/configs/omap3_sdp3430.h
index 229dc5e..55bbcd4 100644
--- a/include/configs/omap3_sdp3430.h
+++ b/include/configs/omap3_sdp3430.h
@@ -36,12 +36,14 @@
 /*
  * High Level Configuration Options
  */
-#define CONFIG_ARMCORTEXA8	1	/* This is an ARM V7 CPU core */
+#define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
 #define CONFIG_OMAP		1	/* in a TI OMAP core */
 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
 #define CONFIG_OMAP3430		1	/* which is in a 3430 */
 #define CONFIG_OMAP3_3430SDP	1	/* working with SDP Rev2 */
 
+#define CONFIG_SDRC	/* The chip has SDRC controller */
+
 #include <asm/arch/cpu.h>		/* get chip and board defs */
 #include <asm/arch/omap3.h>
 
@@ -69,6 +71,8 @@
 #define CONFIG_INITRD_TAG		1
 #define CONFIG_REVISION_TAG		1
 
+#define CONFIG_OF_LIBFDT		1
+
 /*
  * Size of malloc() pool
  * Total Size Environment - 256k
@@ -76,8 +80,6 @@
  */
 #define CONFIG_ENV_SIZE			(256 << 10)
 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (256 << 10))
-#define CONFIG_SYS_GBL_DATA_SIZE	128	/* bytes reserved for */
-						/* initial data */
 
 /*--------------------------------------------------------------------------*/
 
@@ -137,6 +139,9 @@
 #define CONFIG_SYS_I2C_BUS_SELECT	1
 #define CONFIG_DRIVER_OMAP34XX_I2C	1
 
+/* DDR - I use Infineon DDR */
+#define CONFIG_OMAP3_INFINEON_DDR	1
+
 /* OMITTED:  single 1 Gbit MT29F1G NAND flash */
 
 /*
@@ -155,10 +160,6 @@
 #define PHYS_FLASH_SIZE			(128 << 20)
 #define CONFIG_SYS_MAX_FLASH_SECT	512	/* max sectors on one chip */
 
-/* timeout values are in milliseconds */
-#define CONFIG_SYS_FLASH_ERASE_TOUT	(100 * CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_WRITE_TOUT	(100 * CONFIG_SYS_HZ)
-
 /* OMITTED:  single 2 Gbit KFM2G16 OneNAND flash */
 
 #define CONFIG_ENV_IS_IN_FLASH		1
@@ -200,7 +201,8 @@
  */
 #if defined(CONFIG_CMD_NET)
 
-#define CONFIG_DRIVER_LAN91C96
+#define CONFIG_NET_MULTI
+#define CONFIG_LAN91C96
 #define CONFIG_LAN91C96_BASE	DEBUG_BASE
 #define CONFIG_LAN91C96_EXT_PHY
 
@@ -263,12 +265,11 @@
 /*
  * Miscellaneous configurable options
  */
-#define V_PROMPT			"OMAP34XX SDP # "
 
 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
 #define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
 #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
-#define CONFIG_SYS_PROMPT		V_PROMPT
+#define CONFIG_SYS_PROMPT		"OMAP34XX SDP # "
 #define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
 /* Print Buffer Size */
 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
@@ -309,6 +310,12 @@
 #define CONFIG_STACKSIZE_FIQ	(4 << 10) /* FIQ stack */
 #endif
 
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
+#define CONFIG_SYS_INIT_RAM_SIZE	0x800
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_SIZE - \
+					 GENERATED_GBL_DATA_SIZE)
 /*
  * SDRAM Memory Map
  */
@@ -334,9 +341,6 @@
 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)
 
-#define CONFIG_SYS_JFFS2_FIRST_BANK	CONFIG_SYS_MAX_FLASH_BANKS
-#define CONFIG_SYS_JFFS2_NUM_BANKS	1
-
 /*
  * NAND FLASH usage ... default nCS1:
  *  - four 128KB sectors for X-Loader
@@ -355,15 +359,4 @@
  *  - rest for filesystem
  */
 
-/*--------------------------------------------------------------------------*/
-
-#ifndef __ASSEMBLY__
-extern struct gpmc *gpmc_cfg;
-extern unsigned int boot_flash_base;
-extern volatile unsigned int boot_flash_env_addr;
-extern unsigned int boot_flash_off;
-extern unsigned int boot_flash_sec;
-extern unsigned int boot_flash_type;
-#endif
-
 #endif				/* __CONFIG_H */