X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fomap3_sdp3430.h;h=2a890c9c7e8c81e24681974598cec1b8f554fbb2;hb=3d6ba91e793808d1612152e9f9b8c51b3ca6c926;hp=fa2ad534340816e46a66df9519c39c5c71e0b884;hpb=a1725999b8b7527971183122cdfb54e2f87f61ae;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/omap3_sdp3430.h b/include/configs/omap3_sdp3430.h
index fa2ad53..2a890c9 100644
--- a/include/configs/omap3_sdp3430.h
+++ b/include/configs/omap3_sdp3430.h
@@ -36,12 +36,12 @@
 /*
  * High Level Configuration Options
  */
-#define CONFIG_ARMCORTEXA8	1	/* This is an ARM V7 CPU core */
 #define CONFIG_OMAP		1	/* in a TI OMAP core */
 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
-#define CONFIG_OMAP3430		1	/* which is in a 3430 */
 #define CONFIG_OMAP3_3430SDP	1	/* working with SDP Rev2 */
 
+#define CONFIG_SDRC	/* The chip has SDRC controller */
+
 #include <asm/arch/cpu.h>		/* get chip and board defs */
 #include <asm/arch/omap3.h>
 
@@ -61,7 +61,6 @@
 #define V_OSCK			26000000	/* Clock output from T2 */
 #define V_SCLK			(V_OSCK >> 1)
 
-#undef CONFIG_USE_IRQ			/* no support for IRQs */
 #define CONFIG_MISC_INIT_R
 
 #define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
@@ -69,6 +68,8 @@
 #define CONFIG_INITRD_TAG		1
 #define CONFIG_REVISION_TAG		1
 
+#define CONFIG_OF_LIBFDT		1
+
 /*
  * Size of malloc() pool
  * Total Size Environment - 256k
@@ -76,8 +77,6 @@
  */
 #define CONFIG_ENV_SIZE			(256 << 10)
 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (256 << 10))
-#define CONFIG_SYS_GBL_DATA_SIZE	128	/* bytes reserved for */
-						/* initial data */
 
 /*--------------------------------------------------------------------------*/
 
@@ -137,9 +136,6 @@
 #define CONFIG_SYS_I2C_BUS_SELECT	1
 #define CONFIG_DRIVER_OMAP34XX_I2C	1
 
-/* DDR - I use Infineon DDR */
-#define CONFIG_OMAP3_INFINEON_DDR	1
-
 /* OMITTED:  single 1 Gbit MT29F1G NAND flash */
 
 /*
@@ -158,10 +154,6 @@
 #define PHYS_FLASH_SIZE			(128 << 20)
 #define CONFIG_SYS_MAX_FLASH_SECT	512	/* max sectors on one chip */
 
-/* timeout values are in milliseconds */
-#define CONFIG_SYS_FLASH_ERASE_TOUT	(100 * CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_WRITE_TOUT	(100 * CONFIG_SYS_HZ)
-
 /* OMITTED:  single 2 Gbit KFM2G16 OneNAND flash */
 
 #define CONFIG_ENV_IS_IN_FLASH		1
@@ -192,8 +184,9 @@
  */
 
 #if defined(CONFIG_CMD_MMC)
+#define CONFIG_GENERIC_MMC		1
 #define CONFIG_MMC			1
-#define CONFIG_OMAP3_MMC		1
+#define CONFIG_OMAP_HSMMC		1
 #define CONFIG_DOS_PARTITION		1
 #endif
 
@@ -203,7 +196,6 @@
  */
 #if defined(CONFIG_CMD_NET)
 
-#define CONFIG_NET_MULTI
 #define CONFIG_LAN91C96
 #define CONFIG_LAN91C96_BASE	DEBUG_BASE
 #define CONFIG_LAN91C96_EXT_PHY
@@ -267,13 +259,11 @@
 /*
  * Miscellaneous configurable options
  */
-#define V_PROMPT			"OMAP34XX SDP # "
 
 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
 #define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
-#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
-#define CONFIG_SYS_PROMPT		V_PROMPT
-#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
+#define CONFIG_SYS_PROMPT		"OMAP34XX SDP # "
+#define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
 /* Print Buffer Size */
 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
 					sizeof(CONFIG_SYS_PROMPT) + 16)
@@ -302,17 +292,12 @@
 #define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
 #define CONFIG_SYS_HZ			1000
 
-/*
- * Stack sizes
- *
- * The stack sizes are set up in start.S using the settings below
- */
-#define CONFIG_STACKSIZE	(128 << 10) /* Regular stack */
-#ifdef CONFIG_USE_IRQ
-#define CONFIG_STACKSIZE_IRQ	(4 << 10) /* IRQ stack */
-#define CONFIG_STACKSIZE_FIQ	(4 << 10) /* FIQ stack */
-#endif
-
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
+#define CONFIG_SYS_INIT_RAM_SIZE	0x800
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_SIZE - \
+					 GENERATED_GBL_DATA_SIZE)
 /*
  * SDRAM Memory Map
  */
@@ -321,9 +306,6 @@
 #define PHYS_SDRAM_1_SIZE	(32 << 20) /* at least 32 meg */
 #define PHYS_SDRAM_2		OMAP34XX_SDRC_CS1
 
-/* SDRAM Bank Allocation method */
-#define SDRC_R_B_C		1
-
 /*--------------------------------------------------------------------------*/
 
 /*
@@ -338,9 +320,6 @@
 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)
 
-#define CONFIG_SYS_JFFS2_FIRST_BANK	CONFIG_SYS_MAX_FLASH_BANKS
-#define CONFIG_SYS_JFFS2_NUM_BANKS	1
-
 /*
  * NAND FLASH usage ... default nCS1:
  *  - four 128KB sectors for X-Loader
@@ -359,15 +338,6 @@
  *  - rest for filesystem
  */
 
-/*--------------------------------------------------------------------------*/
-
-#ifndef __ASSEMBLY__
-extern struct gpmc *gpmc_cfg;
-extern unsigned int boot_flash_base;
-extern volatile unsigned int boot_flash_env_addr;
-extern unsigned int boot_flash_off;
-extern unsigned int boot_flash_sec;
-extern unsigned int boot_flash_type;
-#endif
+#define CONFIG_SYS_CACHELINE_SIZE	64
 
 #endif				/* __CONFIG_H */