X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fomap3_logic.h;h=4112e5570f6a625d18ab19502d4e4cbf56963f8f;hb=2f57139c211d193debddd25f45c02b738cefd871;hp=b7c3ddf564db8d898fa57a1230efb136fe0f493e;hpb=db289a9d746c5f4ee36002a25303da111f6365e7;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index b7c3ddf..4112e557 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -14,36 +14,10 @@ #include -/* - * We are only ever GP parts and will utilize all of the "downloaded image" - * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB) in - * order to allow for BCH8 to fit in. - */ - -#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG -#define CONFIG_REVISION_TAG - -/* Hardware drivers */ - -/* I2C */ -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C64 */ - -#ifdef CONFIG_USB_EHCI_OMAP -#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 4 -#endif - /* Board NAND Info. */ -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ /* NAND devices */ -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \ 13, 14, 16, 17, 18, 19, 20, 21, 22, \ 23, 24, 25, 26, 27, 28, 30, 31, 32, \ @@ -53,7 +27,6 @@ #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 13 -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW #define CONFIG_SYS_NAND_MAX_OOBFREE 2 #define CONFIG_SYS_NAND_MAX_ECCPOS 56 #endif @@ -169,15 +142,9 @@ "nandboot=run nandbootcommon; "\ "bootm ${loadaddr} - ${fdtaddr}\0"\ -#define CONFIG_BOOTCOMMAND \ - "run autoboot" - /* Miscellaneous configurable options */ /* memtest works on */ -#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) -#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ - 0x01F00000) /* 31MB */ /* FLASH and environment organization */ @@ -187,15 +154,9 @@ #endif #define CONFIG_SYS_MAX_FLASH_SECT 256 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_FLASH_SIZE 0x4000000 -/* Monitor at start of flash */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE - #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ -#define CONFIG_ENV_ADDR 0x260000 /* Defines for SPL */