X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fomap3_logic.h;h=14dabfeb5032dca57e40f3a5f1899bf834e26692;hb=d56b4b19744c314c26dc77585a7c7a9253d1487d;hp=7b60f29bd27c3ad923f391742eb2ea752c27d9d1;hpb=bc80109b117abe4ed2cd4d12c8dc188561bc298e;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 7b60f29..14dabfe 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -11,143 +11,126 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* - * High Level Configuration Options - */ +/* High Level Configuration Options */ #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ -#define CONFIG_SYS_TEXT_BASE 0x80400000 #include -#define CONFIG_OMAP3_LOGIC /* working with Logic OMAP boards */ + +#ifdef CONFIG_SPL_BUILD /* - * Display CPU and Board information + * Disable MMC DM for SPL build and can be re-enabled after adding + * DM support in SPL */ +#undef CONFIG_DM_MMC +#undef CONFIG_DM_MMC_OPS +#undef OMAP_HSMMC_USE_GPIO -#define CONFIG_DISPLAY_CPUINFO -#define CONFIG_DISPLAY_BOARDINFO +/* select serial console configuration for SPL */ +#undef CONFIG_CONS_INDEX +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 +#endif -/* Clock Defines */ -#define V_OSCK 26000000 /* Clock output from T2 */ -#define V_SCLK (V_OSCK >> 1) -#define CONFIG_MISC_INIT_R /* misc_init_r dumps the die id */ +/* + * We are only ever GP parts and will utilize all of the "downloaded image" + * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB) in + * order to allow for BCH8 to fit in. + */ +#undef CONFIG_SPL_TEXT_BASE +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_TEXT_BASE 0x40200000 -#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_MISC_INIT_R /* misc_init_r dumps the die id */ +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG #define CONFIG_REVISION_TAG -#define CONFIG_CMDLINE_EDITING /* cmd line edit/history */ -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check keypress w/no delay */ +/* Hardware drivers */ -/* - * Size of malloc() pool - */ -#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ - /* Sector */ -/* - * Hardware drivers - */ - -/* - * select serial console configuration - */ -#undef CONFIG_CONS_INDEX -#define CONFIG_CONS_INDEX 1 -#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 -#define CONFIG_SERIAL1 1 /* UART1 on OMAP Logic boards */ - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE -#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ - 115200} -#define CONFIG_GENERIC_MMC -#define CONFIG_MMC -#define CONFIG_OMAP_HSMMC -#define CONFIG_DOS_PARTITION +#define CONFIG_USB_OMAP3 /* commands to include */ -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_EXT2 /* EXT2 Support */ -#define CONFIG_CMD_FAT /* FAT support */ -#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ -#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -#define MTDIDS_DEFAULT "nand0=omap2-nand.0" -#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(x-loader),"\ - "1920k(u-boot),128k(u-boot-env),"\ - "4m(kernel),-(fs)" - -#define CONFIG_CMD_I2C /* I2C serial bus support */ -#define CONFIG_CMD_MMC /* MMC support */ -#define CONFIG_CMD_NAND /* NAND support */ +#define CONFIG_CMD_NAND #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */ -#define CONFIG_CMD_PING -#define CONFIG_CMD_DHCP -#define CONFIG_SYS_NO_FLASH - -/* - * I2C - */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_OMAP24_I2C_SPEED 100000 -#define CONFIG_SYS_OMAP24_I2C_SLAVE 1 +/* I2C */ #define CONFIG_SYS_I2C_OMAP34XX - -/* - * TWL4030 - */ - - -/* - * Board NAND Info. - */ -#define CONFIG_SYS_NAND_BASE NAND_BASE +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C64 */ + +/* USB */ +#define CONFIG_USB_MUSB_OMAP2PLUS +#define CONFIG_USB_MUSB_PIO_ONLY +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETHER_RNDIS +#define CONFIG_USB_FUNCTION_FASTBOOT +#define CONFIG_CMD_FASTBOOT +#define CONFIG_ANDROID_BOOT_IMAGE +#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 + +/* TWL4030 */ +#define CONFIG_TWL4030_PWM +#define CONFIG_TWL4030_USB + +/* Board NAND Info. */ +#ifdef CONFIG_NAND #define CONFIG_NAND_OMAP_GPMC -#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ - /* to access nand */ - -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ - /* NAND devices */ +#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ + /* to access nand */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ + /* NAND devices */ #define CONFIG_SYS_NAND_BUSWIDTH_16BIT - +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_PAGE_COUNT 64 +#define CONFIG_SYS_NAND_PAGE_SIZE 2048 +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) +#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS +#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \ + 13, 14, 16, 17, 18, 19, 20, 21, 22, \ + 23, 24, 25, 26, 27, 28, 30, 31, 32, \ + 33, 34, 35, 36, 37, 38, 39, 40, 41, \ + 42, 44, 45, 46, 47, 48, 49, 50, 51, \ + 52, 53, 54, 55, 56} + +#define CONFIG_SYS_NAND_ECCSIZE 512 +#define CONFIG_SYS_NAND_ECCBYTES 13 +#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW +#define CONFIG_BCH +#define CONFIG_SYS_NAND_MAX_OOBFREE 2 +#define CONFIG_SYS_NAND_MAX_ECCPOS 56 +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */ +#define MTDIDS_DEFAULT "nand0=omap2-nand.0" +#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:"\ + "512k(MLO),"\ + "1792k(u-boot),"\ + "128k(spl-os)," \ + "128k(u-boot-env),"\ + "6m(kernel),-(fs)" +#endif /* Environment information */ -/* - * PREBOOT assumes the 4.3" display is attached. User can interrupt - * and modify display variable to suit their needs. - */ #define CONFIG_PREBOOT \ - "echo ======================NOTICE============================;"\ - "echo \"The u-boot environment is not set.\";" \ - "echo \"If using a display a valid display varible for your panel\";" \ - "echo \"needs to be set.\";" \ - "echo \"Valid display options are:\";" \ - "echo \" 2 == LQ121S1DG31 TFT SVGA (12.1) Sharp\";" \ - "echo \" 3 == LQ036Q1DA01 TFT QVGA (3.6) Sharp w/ASIC\";" \ - "echo \" 5 == LQ064D343 TFT VGA (6.4) Sharp\";" \ - "echo \" 7 == LQ10D368 TFT VGA (10.4) Sharp\";" \ - "echo \" 15 == LQ043T1DG01 TFT WQVGA (4.3) Sharp (DEFAULT)\";" \ - "echo \" vga[-dvi or -hdmi] LCD VGA 640x480\";" \ - "echo \" svga[-dvi or -hdmi] LCD SVGA 800x600\";" \ - "echo \" xga[-dvi or -hdmi] LCD XGA 1024x768\";" \ - "echo \" 720p[-dvi or -hdmi] LCD 720P 1280x720\";" \ - "echo \"Defaulting to 4.3 LCD panel (display=15).\";" \ - "setenv display 15;" \ "setenv preboot;" \ + "nand unlock;" \ "saveenv;" - #define CONFIG_EXTRA_ENV_SETTINGS \ - "loadaddr=0x81000000\0" \ - "bootfile=uImage\0" \ + DEFAULT_LINUX_BOOT_ENV \ "mtdids=" MTDIDS_DEFAULT "\0" \ "mtdparts=" MTDPARTS_DEFAULT "\0" \ "mmcdev=0\0" \ + "mmcroot=/dev/mmcblk0p2 rw\0" \ + "mmcrootfstype=ext4 rootwait\0" \ + "nandroot=ubi0:rootfs rw ubi.mtd=fs noinitrd\0" \ + "nandrootfstype=ubifs rootwait\0" \ "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ @@ -157,7 +140,6 @@ "else run defaultboot; fi\0" \ "defaultboot=run mmcramboot\0" \ "consoledevice=ttyO0\0" \ - "display=15\0" \ "setconsole=setenv console ${consoledevice},${baudrate}n8\0" \ "dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \ "rotation=0\0" \ @@ -165,111 +147,132 @@ "setenv bootargs ${bootargs} omapfb.vrfb=y " \ "omapfb.rotate=${rotation}; " \ "fi\0" \ - "otherbootargs=ignore_loglevel early_printk no_console_suspend\0" \ - "addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \ - "common_bootargs=setenv bootargs ${bootargs} display=${display} " \ - "${otherbootargs};" \ - "run addmtdparts; " \ + "optargs=ignore_loglevel early_printk no_console_suspend\0" \ + "common_bootargs=run setconsole; setenv bootargs " \ + "${bootargs} "\ + "console=${console} " \ + "${mtdparts} "\ + "${optargs}; " \ "run vrfb_arg\0" \ - "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ + "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \ "bootscript=echo 'Running bootscript from mmc ...'; " \ "source ${loadaddr}\0" \ - "loaduimage=mmc rescan ${mmcdev}; " \ - "fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \ + "loadimage=mmc rescan; " \ + "load mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \ "ramdisksize=64000\0" \ - "ramdiskaddr=0x82000000\0" \ "ramdiskimage=rootfs.ext2.gz.uboot\0" \ - "ramargs=run setconsole; setenv bootargs console=${console} " \ + "loadramdisk=mmc rescan; " \ + "load mmc ${mmcdev} ${rdaddr} ${ramdiskimage}\0" \ + "ramargs=setenv bootargs "\ "root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \ - "mmcramboot=echo 'Booting kernel from mmc w/ramdisk...'; " \ + "mmcargs=setenv bootargs "\ + "root=${mmcroot} rootfstype=${mmcrootfstype}\0" \ + "nandargs=setenv bootargs "\ + "root=${nandroot} " \ + "rootfstype=${nandrootfstype}\0" \ + "nfsargs=setenv serverip ${tftpserver}; " \ + "setenv bootargs root=/dev/nfs " \ + "nfsroot=${nfsrootpath} " \ + "ip=${ipaddr}:${tftpserver}:${gatewayip}:${netmask}::eth0:off\0" \ + "nfsrootpath=/opt/nfs-exports/omap\0" \ + "autoload=no\0" \ + "loadfdt=mmc rescan; " \ + "load mmc ${mmcdev} ${fdtaddr} ${fdtimage}\0" \ + "mmcbootcommon=echo Booting with DT from mmc${mmcdev} ...; " \ + "run mmcargs; " \ + "run common_bootargs; " \ + "run dump_bootargs; " \ + "run loadimage; " \ + "run loadfdt;\0 " \ + "mmcbootz=setenv bootfile zImage; " \ + "run mmcbootcommon; "\ + "bootz ${loadaddr} - ${fdtaddr}\0" \ + "mmcboot=setenv bootfile uImage; "\ + "run mmcbootcommon; "\ + "bootm ${loadaddr} - ${fdtaddr}\0" \ + "mmcrambootcommon=echo 'Booting kernel from MMC w/ramdisk...'; " \ "run ramargs; " \ "run common_bootargs; " \ "run dump_bootargs; " \ - "run loaduimage; " \ - "fatload mmc ${mmcdev} ${ramdiskaddr} ${ramdiskimage}; "\ - "bootm ${loadaddr} ${ramdiskaddr}\0" \ - "ramboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \ + "run loadimage; " \ + "run loadfdt; " \ + "run loadramdisk\0" \ + "mmcramboot=setenv bootfile uImage; " \ + "run mmcrambootcommon; " \ + "bootm ${loadaddr} ${rdaddr} ${fdtimage}\0" \ + "mmcrambootz=setenv bootfile zImage; " \ + "run mmcrambootcommon; " \ + "bootz ${loadaddr} ${rdaddr} ${fdtimage}\0" \ + "tftpboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \ "run ramargs; " \ "run common_bootargs; " \ "run dump_bootargs; " \ - "tftpboot ${loadaddr} ${bootfile}; "\ - "tftpboot ${ramdiskaddr} ${ramdiskimage}; "\ - "bootm ${loadaddr} ${ramdiskaddr}\0" + "tftpboot ${loadaddr} ${zimage}; " \ + "tftpboot ${rdaddr} ${ramdiskimage}; " \ + "bootm ${loadaddr} ${rdaddr}\0" \ + "tftpbootz=echo 'Booting kernel NFS rootfs...'; " \ + "dhcp;" \ + "run nfsargs;" \ + "run common_bootargs;" \ + "run dump_bootargs;" \ + "tftpboot $loadaddr zImage;" \ + "bootz $loadaddr\0" \ + "nandbootcommon=echo 'Booting kernel from NAND...';" \ + "nand unlock;" \ + "run nandargs;" \ + "run common_bootargs;" \ + "run dump_bootargs;" \ + "nand read ${loadaddr} kernel;" \ + "nand read ${fdtaddr} spl-os;\0" \ + "nandbootz=run nandbootcommon; "\ + "bootz ${loadaddr} - ${fdtaddr}\0"\ + "nandboot=run nandbootcommon; "\ + "bootm ${loadaddr} - ${fdtaddr}\0"\ #define CONFIG_BOOTCOMMAND \ "run autoboot" -#define CONFIG_AUTO_COMPLETE -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) - +/* Miscellaneous configurable options */ /* memtest works on */ #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 0x01F00000) /* 31MB */ -/* - * OMAP3 has 12 GP timers, they can be driven by the system clock - * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). - * This rate is divided by a local divisor. - */ -#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ - -/* - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ -#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 -#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 - -/* - * FLASH and environment organization - */ +/* FLASH and environment organization */ /* **** PISMO SUPPORT *** */ -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ - #if defined(CONFIG_CMD_NAND) #define CONFIG_SYS_FLASH_BASE NAND_BASE -#elif defined(CONFIG_CMD_ONENAND) -#define CONFIG_SYS_FLASH_BASE ONENAND_MAP #endif /* Monitor at start of flash */ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE +#define CONFIG_ENV_IS_IN_NAND 1 +#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ -#if defined(CONFIG_CMD_NAND) -#define CONFIG_NAND_OMAP_GPMC -#define CONFIG_ENV_IS_IN_NAND -#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET -#endif - #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ -#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET - -#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 -#define CONFIG_SYS_INIT_RAM_SIZE 0x800 +#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET +#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET -/* - * SMSC922x Ethernet - */ +/* SMSC922x Ethernet */ #if defined(CONFIG_CMD_NET) - #define CONFIG_SMC911X -#define CONFIG_SMC911X_16_BIT +#define CONFIG_SMC911X_32_BIT #define CONFIG_SMC911X_BASE 0x08000000 - #endif /* (CONFIG_CMD_NET) */ +/* Defines for SPL */ + +#define CONFIG_SPL_OMAP3_ID_NAND + +/* NAND: SPL falcon mode configs */ +#ifdef CONFIG_SPL_OS_BOOT +#define CONFIG_CMD_SPL_NAND_OFS 0x240000 +#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 +#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 +#endif + #endif /* __CONFIG_H */