X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fomap3_igep00x0.h;h=c1ef040ce360099184549dc82a36bde768f8d836;hb=5a606a4c977dda5d3079502dca12800c62a68465;hp=76d8e13d52c107d1d5bc79bb062d4d241d894627;hpb=1d12a7c8cd4e58d5c3989bc239d5fa9577079dfd;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h
index 76d8e13..c1ef040 100644
--- a/include/configs/omap3_igep00x0.h
+++ b/include/configs/omap3_igep00x0.h
@@ -1,33 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Common configuration settings for IGEP technology based boards
  *
  * (C) Copyright 2012
  * ISEE 2007 SL, <www.iseebcn.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __IGEP00X0_H
 #define __IGEP00X0_H
 
-#define CONFIG_NR_DRAM_BANKS            2
-
 #include <configs/ti_omap3_common.h>
 
 /*
  * We are only ever GP parts and will utilize all of the "downloaded image"
  * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
  */
-#undef CONFIG_SPL_TEXT_BASE
-#define CONFIG_SPL_TEXT_BASE		0x40200000
-
-#define CONFIG_MISC_INIT_R
-
-#define CONFIG_REVISION_TAG		1
-
-/* GPIO banks */
-#define CONFIG_OMAP3_GPIO_2		/* GPIO32..63   is in GPIO bank 2 */
-#define CONFIG_OMAP3_GPIO_4		/* GPIO96..127  is in GPIO bank 4 */
 
 /* TPS65950 */
 #define PBIASLITEVMODE1			(1 << 8)
@@ -41,16 +28,6 @@
 #define GPIO_IGEP00X0_BOARD_DETECTION		28
 #define GPIO_IGEP00X0_REVISION_DETECTION	129
 
-/* USB device configuration */
-#define CONFIG_USB_DEVICE		1
-#define CONFIG_USB_TTY			1
-
-/* Change these to suit your needs */
-#define CONFIG_USBD_VENDORID		0x0451
-#define CONFIG_USBD_PRODUCTID		0x5678
-#define CONFIG_USBD_MANUFACTURER	"Texas Instruments"
-#define CONFIG_USBD_PRODUCT_NAME	"IGEP"
-
 #ifndef CONFIG_SPL_BUILD
 
 /* Environment */
@@ -92,21 +69,12 @@
 
 #endif
 
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_SYS_MTDPARTS_RUNTIME
-
 /* OneNAND config */
 #define CONFIG_USE_ONENAND_BOARD_INIT
 #define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP
 #define CONFIG_SYS_ONENAND_BLOCK_SIZE	(128*1024)
 
 /* NAND config */
-#define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_PAGE_COUNT	64
-#define CONFIG_SYS_NAND_PAGE_SIZE	2048
-#define CONFIG_SYS_NAND_OOBSIZE		64
-#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
-#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCPOS		{ 2,  3,  4,  5,  6,  7,  8,  9, \
 					 10, 11, 12, 13, 14, 15, 16, 17, \
 					 18, 19, 20, 21, 22, 23, 24, 25, \
@@ -116,28 +84,5 @@
 					 50, 51, 52, 53, 54, 55, 56, 57, }
 #define CONFIG_SYS_NAND_ECCSIZE		512
 #define CONFIG_SYS_NAND_ECCBYTES	14
-#define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
-
-/* UBI configuration */
-#define CONFIG_SPL_UBI			1
-#define CONFIG_SPL_UBI_MAX_VOL_LEBS	256
-#define CONFIG_SPL_UBI_MAX_PEB_SIZE	(256*1024)
-#define CONFIG_SPL_UBI_MAX_PEBS		4096
-#define CONFIG_SPL_UBI_VOL_IDS		8
-#define CONFIG_SPL_UBI_LOAD_MONITOR_ID	0
-#define CONFIG_SPL_UBI_LOAD_KERNEL_ID	3
-#define CONFIG_SPL_UBI_LOAD_ARGS_ID	4
-#define CONFIG_SPL_UBI_PEB_OFFSET	4
-#define CONFIG_SPL_UBI_VID_OFFSET	512
-#define CONFIG_SPL_UBI_LEB_START	2048
-#define CONFIG_SPL_UBI_INFO_ADDR	0x88080000
-
-/* environment organization */
-#define CONFIG_ENV_UBI_PART		"UBI"
-#define CONFIG_ENV_UBI_VOLUME		"config"
-#define CONFIG_ENV_UBI_VOLUME_REDUND	"config_r"
-#define CONFIG_UBI_SILENCE_MSG		1
-#define CONFIG_UBIFS_SILENCE_MSG	1
-#define CONFIG_ENV_SIZE			(32*1024)
 
 #endif /* __IGEP00X0_H */