X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fomap2420h4.h;h=9018440d1ac11898a3726b785ffefa72141736a5;hb=225f0eaa745adfae05931848543d99942798756a;hp=da68c1c76d30a35d657def539d77624a05e92ffb;hpb=082acfd4849d2f0471b0709fe7f5ce1de387437d;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/omap2420h4.h b/include/configs/omap2420h4.h index da68c1c..9018440 100644 --- a/include/configs/omap2420h4.h +++ b/include/configs/omap2420h4.h @@ -38,11 +38,17 @@ /*#define CONFIG_APTIX 1 #* define if on APTIX test chip */ /*#define CONFIG_VIRTIO 1 #* Using Virtio simulator */ -#define PRCM_CONFIG_II 1 -#define CONFIG_PARTIAL_SRAM 1 +/* Clock config to target*/ +#define PRCM_CONFIG_II 1 +/* #define PRCM_CONFIG_III 1 */ #include /* get chip and board defs */ +/* On H4, NOR and NAND flash are mutual exclusive. + Define this if you want to use NAND + */ +/*#define CFG_NAND_BOOT */ + #ifdef CONFIG_APTIX #define V_SCLK 1500000 #else @@ -59,12 +65,13 @@ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 #define CONFIG_INITRD_TAG 1 +#define CONFIG_REVISION_TAG 1 /* * Size of malloc() pool */ -#define CFG_ENV_SIZE SZ_128K /* Total Size of Environment Sector */ -#define CFG_MALLOC_LEN (CFG_ENV_SIZE + SZ_128K) +#define CONFIG_ENV_SIZE SZ_128K /* Total Size of Environment Sector */ +#define CFG_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_128K) #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ /* @@ -112,15 +119,70 @@ #define CONFIG_BAUDRATE 115200 #define CFG_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} -#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP | CFG_CMD_I2C) -/* I'd like to get to these. Snap kernel loads if we make MMC go */ - /* #define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_NAND | CFG_CMD_JFFS2 | CFG_CMD_DHCP | CFG_CMD_MMC | CFG_CMD_FAT | CFG_CMD_I2C) */ +/* + * Command line configuration. + */ +#include + +#ifdef CFG_NAND_BOOT + #define CONFIG_CMD_DHCP + #define CONFIG_CMD_I2C + #define CONFIG_CMD_NAND + #define CONFIG_CMD_JFFS2 +#else + #define CONFIG_CMD_DHCP + #define CONFIG_CMD_I2C + #define CONFIG_CMD_JFFS2 + + #undef CONFIG_CMD_AUTOSCRIPT +#endif + + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_SUBNETMASK +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME +#define CONFIG_BOOTP_BOOTPATH + + +/* + * Board NAND Info. + */ +#define CONFIG_NAND_LEGACY +#define CFG_NAND_ADDR 0x04000000 /* physical address to access nand at CS0*/ + +#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ +#define SECTORSIZE 512 -#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT +#define ADDR_COLUMN 1 +#define ADDR_PAGE 2 +#define ADDR_COLUMN_PAGE 3 -/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ -#include +#define NAND_ChipID_UNKNOWN 0x00 +#define NAND_MAX_FLOORS 1 +#define NAND_MAX_CHIPS 1 + +#define WRITE_NAND_COMMAND(d, adr) do {*(volatile u16 *)0x6800A07C = d;} while(0) +#define WRITE_NAND_ADDRESS(d, adr) do {*(volatile u16 *)0x6800A080 = d;} while(0) +#define WRITE_NAND(d, adr) do {*(volatile u16 *)0x6800A084 = d;} while(0) +#define READ_NAND(adr) (*(volatile u16 *)0x6800A084) +#define NAND_WAIT_READY(nand) udelay(10) + +#define NAND_NO_RB 1 + +#define CFG_NAND_WP +#define NAND_WP_OFF() do {*(volatile u32 *)(0x6800A050) |= 0x00000010;} while(0) +#define NAND_WP_ON() do {*(volatile u32 *)(0x6800A050) &= ~0x00000010;} while(0) + +#define NAND_CTL_CLRALE(nandptr) +#define NAND_CTL_SETALE(nandptr) +#define NAND_CTL_CLRCLE(nandptr) +#define NAND_CTL_SETCLE(nandptr) +#define NAND_DISABLE_CE(nand) +#define NAND_ENABLE_CE(nand) #define CONFIG_BOOTDELAY 3 @@ -191,23 +253,61 @@ #define PHYS_SDRAM_1_SIZE SZ_32M /* at least 32 meg */ #define PHYS_SDRAM_2 OMAP2420_SDRC_CS1 +#define PHYS_FLASH_SECT_SIZE SZ_128K #define PHYS_FLASH_1 H4_CS0_BASE /* Flash Bank #1 */ #define PHYS_FLASH_SIZE_1 SZ_32M #define PHYS_FLASH_2 (H4_CS0_BASE+SZ_32M) /* same cs, 2 chips in series */ #define PHYS_FLASH_SIZE_2 SZ_32M -#define CFG_FLASH_BASE PHYS_FLASH_1 /*----------------------------------------------------------------------- * FLASH and environment organization */ +#define CFG_FLASH_BASE PHYS_FLASH_1 #define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ #define CFG_MAX_FLASH_SECT (259) /* max number of sectors on one chip */ +#define CFG_MONITOR_BASE CFG_FLASH_BASE /* Monitor at beginning of flash */ +#define CFG_MONITOR_LEN SZ_128K /* Reserve 1 sector */ +#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE, CFG_FLASH_BASE + PHYS_FLASH_SIZE_1 } + +#ifdef CFG_NAND_BOOT +#define CONFIG_ENV_IS_IN_NAND 1 +#define CONFIG_ENV_OFFSET 0x80000 /* environment starts here */ +#else +#define CONFIG_ENV_ADDR (CFG_FLASH_BASE + SZ_128K) +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_SECT_SIZE PHYS_FLASH_SECT_SIZE +#define CONFIG_ENV_OFFSET ( CFG_MONITOR_BASE + CFG_MONITOR_LEN ) /* Environment after Monitor */ +#endif -#define CFG_ENV_ADDR (CFG_FLASH_BASE + SZ_128K) -#define CFG_ENV_IS_IN_FLASH 1 +/*----------------------------------------------------------------------- + * CFI FLASH driver setup + */ +#define CFG_FLASH_CFI 1 /* Flash memory is CFI compliant */ +#define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/mtd/cfi_flash.c */ +#define CFG_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */ +#define CFG_FLASH_PROTECTION 1 /* Use hardware sector protection */ /* timeout values are in ticks */ -#define CFG_FLASH_ERASE_TOUT (10*75*CFG_HZ) /* Timeout for Flash Erase */ -#define CFG_FLASH_WRITE_TOUT (10*75*CFG_HZ) /* Timeout for Flash Write */ +#define CFG_FLASH_ERASE_TOUT (100*CFG_HZ) /* Timeout for Flash Erase */ +#define CFG_FLASH_WRITE_TOUT (100*CFG_HZ) /* Timeout for Flash Write */ + +#define CFG_JFFS2_MEM_NAND + +/* + * JFFS2 partitions + */ +/* No command line, one static partition, whole device */ +#undef CONFIG_JFFS2_CMDLINE +#define CONFIG_JFFS2_DEV "nor1" +#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF +#define CONFIG_JFFS2_PART_OFFSET 0x00000000 + +/* mtdparts command line support */ +/* Note: fake mtd_id used, no linux mtd map file */ +/* +#define CONFIG_JFFS2_CMDLINE +#define MTDIDS_DEFAULT "nor1=omap2420-1" +#define MTDPARTS_DEFAULT "mtdparts=omap2420-1:-(jffs2)" +*/ #endif /* __CONFIG_H */