X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fomap1610h2.h;h=beff6d89d71a0a4040269853abd64c78fd9dfdb1;hb=436be29cad60a46ed5983120aff71909d8f234a3;hp=2eb65e20811f752871ba0398b0e635b686d93853;hpb=63e73c9a8ed5b32d9c4067ffaad953e9a8fe8f0a;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/omap1610h2.h b/include/configs/omap1610h2.h index 2eb65e2..beff6d8 100644 --- a/include/configs/omap1610h2.h +++ b/include/configs/omap1610h2.h @@ -40,6 +40,7 @@ #define CONFIG_OMAP 1 /* in a TI OMAP core */ #define CONFIG_OMAP1610 1 /* which is in a 1610 */ #define CONFIG_H2_OMAP1610 1 /* on an H2 Board */ +#define CONFIG_MACH_OMAP_H2 /* Select board mach-type */ /* input clock of PLL */ /* the OMAP1610 H2 has 12MHz input clock */ @@ -51,6 +52,7 @@ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 /* * Size of malloc() pool @@ -73,7 +75,7 @@ #define CFG_NS16550_REG_SIZE (-4) #define CFG_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */ #define CFG_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart */ - + /* * select serial console configuration */ @@ -93,13 +95,9 @@ #include #define CONFIG_BOOTDELAY 3 -#define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd \ - root=/dev/nfs rw nfsroot=157.87.82.48:\ - /home/a0875451/mwd/myfs/target ip=dhcp" -#define CONFIG_NETMASK 255.255.254.0 /* talk on MY local net */ -#define CONFIG_IPADDR 156.117.97.156 /* static IP I currently own */ -#define CONFIG_SERVERIP 156.117.97.139 /* current IP of my dev pc */ -#define CONFIG_BOOTFILE "uImage" /* file to load */ +#define CONFIG_BOOTARGS "console=ttyS0,115200n8 noinitrd root=/dev/nfs ip=dhcp" +#define CONFIG_BOOTCOMMAND "bootp;tftp;bootm" +#define CFG_AUTOLOAD "n" /* No autoload */ #if (CONFIG_COMMANDS & CFG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ @@ -145,18 +143,29 @@ /*----------------------------------------------------------------------- * Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */ +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ -#ifdef CONFIG_CS0_BOOT -#define PHYS_FLASH_1 0x0C000000 -#endif -#ifdef CONFIG_CS3_BOOT -#define PHYS_FLASH_1 0x00000000 +#define PHYS_FLASH_1_BM1 0x00000000 /* Flash Bank #1 if booting from flash */ +#define PHYS_FLASH_1_BM0 0x0C000000 /* Flash Bank #1 if booting from RAM */ + +#ifdef CONFIG_CS_AUTOBOOT /* Determine CS assignment in runtime */ + +#ifndef __ASSEMBLY__ +extern unsigned long omap_flash_base; /* set in flash__init */ #endif +#define CFG_FLASH_BASE omap_flash_base + +#elif defined(CONFIG_CS0_BOOT) -#define CFG_FLASH_BASE PHYS_FLASH_1 +#define CFG_FLASH_BASE PHYS_FLASH_1_BM0 + +#else + +#define CFG_FLASH_BASE PHYS_FLASH_1_BM1 + +#endif /*----------------------------------------------------------------------- * FLASH and environment organization