X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fnetstar.h;h=f0b420781ed890516169b260316cd057101b5d9f;hb=a694610d3361465d4c8d27dde72ab8b63d31115e;hp=23fd18b8f185785bbcef972e7020bf85cfbedd2e;hpb=0e8d158664a913392cb01fb11a948d83f72e105e;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/netstar.h b/include/configs/netstar.h index 23fd18b..f0b4207 100644 --- a/include/configs/netstar.h +++ b/include/configs/netstar.h @@ -49,7 +49,7 @@ #define CONFIG_INITRD_TAG 1 #define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */ -#define CFG_CONSOLE_INFO_QUIET +#define CONFIG_SYS_CONSOLE_INFO_QUIET /* * Physical Memory Map @@ -59,18 +59,8 @@ #define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024) #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ -/* - * FLASH organization - */ -#define CFG_FLASH_BASE PHYS_FLASH_1 -#define CFG_MAX_FLASH_BANKS 1 -#define PHYS_FLASH_1_SIZE (1 * 1024 * 1024) -#define CFG_MAX_FLASH_SECT 19 -#define CFG_FLASH_ERASE_TOUT (5*CFG_HZ) /* in ticks */ -#define CFG_FLASH_WRITE_TOUT (5*CFG_HZ) - -#define CFG_MONITOR_BASE PHYS_FLASH_1 -#define CFG_MONITOR_LEN (256 * 1024) +#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 +#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* * Environment settings @@ -86,8 +76,8 @@ /* * Size of malloc() pool */ -#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ -#define CFG_MALLOC_LEN (4 * 1024 * 1024) +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ +#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) /* * The stack size is set up in start.S using the settings below @@ -97,37 +87,53 @@ /* * Hardware drivers */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK (CONFIG_XTAL_FREQ) /* can be 12M/32Khz or 48Mhz */ +#define CONFIG_SYS_NS16550_COM1 OMAP1510_UART1_BASE /* uart1 */ + #define CONFIG_DRIVER_SMC91111 -#define CONFIG_SMC91111_BASE 0x04000300 +#define CONFIG_SMC91111_BASE 0x04000300 -/* - * NS16550 Configuration - */ -#define CFG_NS16550 -#define CFG_NS16550_SERIAL -#define CFG_NS16550_REG_SIZE (-4) -#define CFG_NS16550_CLK (CONFIG_XTAL_FREQ) /* can be 12M/32Khz or 48Mhz */ -#define CFG_NS16550_COM1 OMAP1510_UART1_BASE /* uart1 */ +#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 19 + +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT +#define CONFIG_FLASH_CFI_LEGACY +#define CONFIG_SYS_FLASH_LEGACY_512Kx16 + +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x04000000 + (2 << 23) +#define NAND_ALLOW_ERASE_ALL 1 + +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ -#define CONFIG_CONS_INDEX 1 -#define CONFIG_BAUDRATE 115200 -#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#define CONFIG_HARD_I2C +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 1 +#define CONFIG_DRIVER_OMAP1510_I2C + +#define CONFIG_RTC_DS1307 +#define CONFIG_SYS_I2C_RTC_ADDR 0x68 + + +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } /*#define CONFIG_SKIP_RELOCATE_UBOOT*/ /*#define CONFIG_SKIP_LOWLEVEL_INIT */ /* - * NAND flash - */ -#define CFG_MAX_NAND_DEVICE 1 -#define NAND_MAX_CHIPS 1 -#define CFG_NAND_BASE 0x04000000 + (2 << 23) -#define NAND_ALLOW_ERASE_ALL 1 - -/* * partitions (mtdparts command line support) */ -#define CONFIG_JFFS2_CMDLINE +#define CONFIG_CMD_MTDPARTS +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define CONFIG_FLASH_CFI_MTD #define MTDIDS_DEFAULT "nor0=omapflash.0,nand0=omapnand.0" #define MTDPARTS_DEFAULT "mtdparts=" \ "omapflash.0:8k@16k(env),8k(r_env),448k@576k(u-boot);" \ @@ -137,11 +143,11 @@ /* * Command line configuration. */ - #define CONFIG_CMD_BDI #define CONFIG_CMD_BOOTD +#define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP -#define CONFIG_CMD_ENV +#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_FLASH #define CONFIG_CMD_IMI #define CONFIG_CMD_JFFS2 @@ -168,7 +174,7 @@ #define CONFIG_BOOTDELAY 3 #define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */ #undef CONFIG_BOOTARGS /* the boot command will set bootargs*/ -#define CFG_AUTOLOAD "n" /* No autoload */ +#define CONFIG_SYS_AUTOLOAD "n" /* No autoload */ #define CONFIG_BOOTCOMMAND "run fboot" #define CONFIG_PREBOOT "run setup" #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -203,31 +209,29 @@ /* * Miscellaneous configurable options */ -#define CFG_LONGHELP /* undef to save memory */ -#define CFG_PROMPT "# " /* Monitor Command Prompt */ -#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ -#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ -#define CFG_MAXARGS 16 /* max number of command args */ -#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ - -#define CFG_HUSH_PARSER -#define CFG_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "# " /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ + +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_AUTO_COMPLETE -#define CFG_MEMTEST_START PHYS_SDRAM_1 -#define CFG_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - \ - (CFG_MONITOR_LEN + CFG_MALLOC_LEN + CONFIG_STACKSIZE) - -#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 +#define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - \ + (CONFIG_SYS_MONITOR_LEN + CONFIG_SYS_MALLOC_LEN + CONFIG_STACKSIZE) -#define CFG_LOAD_ADDR PHYS_SDRAM_1 + 0x400000 /* default load address */ +#define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1 + 0x400000 /* default load address */ -/* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1. +/* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1. * This time is further subdivided by a local divisor. */ -#define CFG_TIMERBASE OMAP1510_TIMER1_BASE -#define CFG_PVT 7 /* 2^(pvt+1), divide by 256 */ -#define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT)) +#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE +#define CONFIG_SYS_PTV 7 +#define CONFIG_SYS_HZ 1000 #define OMAP5910_DPLL_DIV 1 #define OMAP5910_DPLL_MUL ((CONFIG_SYS_CLK_FREQ * \