X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fnetstar.h;h=20b423bb8b67edfe0e9a7de8a15b1f5c8a74dde8;hb=4b142febff71eabdb7ddbb125c7b583b24ddc434;hp=2c90265e3b4c9f1be9f6bc71ae2ef85dfa06039d;hpb=ea393eb1d6a786fc2e895f90abb5f7e7541aef45;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/netstar.h b/include/configs/netstar.h
index 2c90265..20b423b 100644
--- a/include/configs/netstar.h
+++ b/include/configs/netstar.h
@@ -59,17 +59,7 @@
 #define PHYS_SDRAM_1_SIZE	(64 * 1024 * 1024)
 #define PHYS_FLASH_1		0x00000000	/* Flash Bank #1 */
 
-/*
- * FLASH organization
- */
-#define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1
-#define CONFIG_SYS_MAX_FLASH_BANKS	1
-#define PHYS_FLASH_1_SIZE	(1 * 1024 * 1024)
-#define CONFIG_SYS_MAX_FLASH_SECT	19
-#define CONFIG_SYS_FLASH_ERASE_TOUT	(5*CONFIG_SYS_HZ) /* in ticks */
-#define CONFIG_SYS_FLASH_WRITE_TOUT	(5*CONFIG_SYS_HZ)
-
-#define CONFIG_SYS_MONITOR_BASE	PHYS_FLASH_1
+#define CONFIG_SYS_MONITOR_BASE		PHYS_FLASH_1
 #define CONFIG_SYS_MONITOR_LEN		(256 * 1024)
 
 /*
@@ -97,36 +87,52 @@
 /*
  * Hardware drivers
  */
-#define CONFIG_DRIVER_SMC91111
-#define CONFIG_SMC91111_BASE	0x04000300
-
-/*
- * NS16550 Configuration
- */
 #define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
 #define CONFIG_SYS_NS16550_CLK		(CONFIG_XTAL_FREQ)	/* can be 12M/32Khz or 48Mhz  */
-#define CONFIG_SYS_NS16550_COM1	OMAP1510_UART1_BASE	/* uart1 */
+#define CONFIG_SYS_NS16550_COM1		OMAP1510_UART1_BASE	/* uart1 */
+
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111
+#define CONFIG_SMC91111_BASE		0x04000300
+
+#define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1
+#define CONFIG_SYS_MAX_FLASH_BANKS	1
+#define CONFIG_SYS_MAX_FLASH_SECT	19
+
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
+#define CONFIG_FLASH_CFI_LEGACY
+#define CONFIG_SYS_FLASH_LEGACY_512Kx16
+
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+#define CONFIG_SYS_NAND_BASE		0x04000000 + (2 << 23)
+#define NAND_ALLOW_ERASE_ALL		1
+
+#define CONFIG_HARD_I2C
+#define CONFIG_SYS_I2C_SPEED		100000
+#define CONFIG_SYS_I2C_SLAVE		1
+#define CONFIG_DRIVER_OMAP1510_I2C
+
+#define CONFIG_RTC_DS1307
+#define CONFIG_SYS_I2C_RTC_ADDR		0x68
+
 
-#define CONFIG_CONS_INDEX	1
-#define CONFIG_BAUDRATE		115200
+#define CONFIG_CONS_INDEX		1
+#define CONFIG_BAUDRATE			115200
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
 
 /*#define CONFIG_SKIP_RELOCATE_UBOOT*/
 /*#define CONFIG_SKIP_LOWLEVEL_INIT */
 
 /*
- * NAND flash
- */
-#define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define CONFIG_SYS_NAND_BASE	0x04000000 + (2 << 23)
-#define NAND_ALLOW_ERASE_ALL	1
-
-/*
  * partitions (mtdparts command line support)
  */
-#define CONFIG_JFFS2_CMDLINE
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_MTD_DEVICE		/* needed for mtdparts commands */
+#define CONFIG_FLASH_CFI_MTD
 #define MTDIDS_DEFAULT		"nor0=omapflash.0,nand0=omapnand.0"
 #define MTDPARTS_DEFAULT	"mtdparts=" \
 	"omapflash.0:8k@16k(env),8k(r_env),448k@576k(u-boot);" \
@@ -136,9 +142,9 @@
 /*
  * Command line configuration.
  */
-
 #define CONFIG_CMD_BDI
 #define CONFIG_CMD_BOOTD
+#define CONFIG_CMD_DATE
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_SAVEENV
 #define CONFIG_CMD_FLASH
@@ -217,16 +223,14 @@
 #define CONFIG_SYS_MEMTEST_END		PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - \
 				(CONFIG_SYS_MONITOR_LEN + CONFIG_SYS_MALLOC_LEN + CONFIG_STACKSIZE)
 
-#undef	CONFIG_SYS_CLKS_IN_HZ		/* everything, incl board info, in Hz */
-
 #define CONFIG_SYS_LOAD_ADDR		PHYS_SDRAM_1 + 0x400000	/* default load address */
 
-/* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1.
+/* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1.
  * This time is further subdivided by a local divisor.
  */
 #define CONFIG_SYS_TIMERBASE		OMAP1510_TIMER1_BASE
-#define CONFIG_SYS_PVT			7		/* 2^(pvt+1), divide by 256 */
-#define CONFIG_SYS_HZ			((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_PTV			7
+#define CONFIG_SYS_HZ			1000
 
 #define OMAP5910_DPLL_DIV	1
 #define OMAP5910_DPLL_MUL	((CONFIG_SYS_CLK_FREQ * \