X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fmxs.h;h=b5c525dc786b91f9e9b2cf3d63d921a3a5dba693;hb=4884d829d72e58d3448df46325699cdc2151686e;hp=b26bc01977fdff460a50b913b38bdc6389bc749d;hpb=1d2c0506d31a9997e5ffc22e90942902f673b107;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/mxs.h b/include/configs/mxs.h
index b26bc01..b5c525d 100644
--- a/include/configs/mxs.h
+++ b/include/configs/mxs.h
@@ -42,18 +42,14 @@
  */
 
 /* Startup hooks */
-#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_ARCH_MISC_INIT
 
 /* SPL */
-#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
+#ifndef CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_NO_CPU_SUPPORT
 #define CONFIG_SPL_START_S_PATH	"arch/arm/cpu/arm926ejs/mxs"
-#define CONFIG_SPL_LDSCRIPT	"arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
+#endif
 
 /* Memory sizes */
-#define CONFIG_SYS_MALLOC_LEN		0x00400000	/* 4 MB for malloc */
-#define CONFIG_SYS_MEMTEST_START	0x40000000	/* Memtest start adr */
-#define CONFIG_SYS_MEMTEST_END		0x40400000	/* 4 MB RAM test */
 
 /* OCRAM at 0x0 ; 32kB on MX23 ; 128kB on MX28 */
 #define CONFIG_SYS_INIT_RAM_ADDR	0x00000000
@@ -81,48 +77,26 @@
  * As for the SPL, we must avoid the first 4 KiB as well, but we load the
  * IVT and CST to 0x8000, so we don't need to waste the subsequent 4 KiB.
  */
-#define CONFIG_SYS_TEXT_BASE		0x40002000
-#define CONFIG_SPL_TEXT_BASE		0x00001000
 
 /* U-Boot general configuration */
-#define CONFIG_SYS_LONGHELP
 #define CONFIG_SYS_CBSIZE	1024		/* Console I/O buffer size */
 #define CONFIG_SYS_MAXARGS	32		/* Max number of command args */
 #define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
 						/* Boot argument buffer size */
-#define CONFIG_AUTO_COMPLETE			/* Command auto complete */
-#define CONFIG_CMDLINE_EDITING			/* Command history etc */
-
-/* Booting Linux */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
 
 /*
  * Drivers
  */
-
-/* APBH DMA */
-#define CONFIG_APBH_DMA
-
-/* GPIO */
-#define CONFIG_MXS_GPIO
-
 /*
  * DUART Serial Driver.
  * Conflicts with AUART driver which can be set by board.
  */
-#define CONFIG_PL011_SERIAL
 #define CONFIG_PL011_CLOCK		24000000
 #define CONFIG_PL01x_PORTS		{ (void *)MXS_UARTDBG_BASE }
-#define CONFIG_CONS_INDEX		0
 /* Default baudrate can be overridden by board! */
-#ifndef CONFIG_BAUDRATE
-#define CONFIG_BAUDRATE			115200
-#endif
 
 /* FEC Ethernet on SoC */
 #ifdef CONFIG_FEC_MXC
-#define CONFIG_MII
 #ifndef CONFIG_ETHPRIME
 #define CONFIG_ETHPRIME			"FEC0"
 #endif
@@ -131,33 +105,15 @@
 #endif
 #endif
 
-/* I2C */
-#ifdef CONFIG_CMD_I2C
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXS
-#define CONFIG_HARD_I2C
-#ifndef CONFIG_SYS_I2C_SPEED
-#define CONFIG_SYS_I2C_SPEED		400000
-#endif
-#endif
-
 /* LCD */
 #ifdef CONFIG_VIDEO
 #define CONFIG_VIDEO_MXS
 #endif
 
-/* MMC */
-#ifdef CONFIG_CMD_MMC
-#define CONFIG_GENERIC_MMC
-#define CONFIG_BOUNCE_BUFFER
-#endif
-
 /* NAND */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_MXS
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		0x60000000
-#define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #endif
 
 /* OCOTP */
@@ -167,14 +123,11 @@
 
 /* SPI */
 #ifdef CONFIG_CMD_SPI
-#define CONFIG_HARD_SPI
-#define CONFIG_MXS_SPI
 #define CONFIG_SPI_HALF_DUPLEX
 #endif
 
 /* USB */
 #ifdef CONFIG_CMD_USB
-#define CONFIG_USB_EHCI
 #define CONFIG_USB_EHCI_MXS
 #define CONFIG_EHCI_IS_TDI
 #endif