X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fmxs.h;h=4bb3621a42860d6112dd0f5ce9e86849608e27e4;hb=9450ab2ba8d720bd9f73bccc0af2e2b5a2c2aaf1;hp=041dcde38e76766bd5a02cd3106e91c2fdf8a676;hpb=d09ec7f81650425140776995fc9752189ddf7956;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/mxs.h b/include/configs/mxs.h
index 041dcde..4bb3621 100644
--- a/include/configs/mxs.h
+++ b/include/configs/mxs.h
@@ -44,9 +44,10 @@
 /* Startup hooks */
 
 /* SPL */
+#ifndef CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE
 #define CONFIG_SPL_START_S_PATH	"arch/arm/cpu/arm926ejs/mxs"
-#define CONFIG_SPL_LDSCRIPT	"arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
+#endif
 
 /* Memory sizes */
 #define CONFIG_SYS_MALLOC_LEN		0x00400000	/* 4 MB for malloc */
@@ -79,17 +80,13 @@
  * As for the SPL, we must avoid the first 4 KiB as well, but we load the
  * IVT and CST to 0x8000, so we don't need to waste the subsequent 4 KiB.
  */
-#define CONFIG_SYS_TEXT_BASE		0x40002000
 #define CONFIG_SPL_TEXT_BASE		0x00001000
 
 /* U-Boot general configuration */
-#define CONFIG_SYS_LONGHELP
 #define CONFIG_SYS_CBSIZE	1024		/* Console I/O buffer size */
 #define CONFIG_SYS_MAXARGS	32		/* Max number of command args */
 #define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
 						/* Boot argument buffer size */
-#define CONFIG_AUTO_COMPLETE			/* Command auto complete */
-#define CONFIG_CMDLINE_EDITING			/* Command history etc */
 
 /* Booting Linux */
 #define CONFIG_CMDLINE_TAG
@@ -100,7 +97,6 @@
  */
 
 /* APBH DMA */
-#define CONFIG_APBH_DMA
 
 /* GPIO */
 #define CONFIG_MXS_GPIO
@@ -109,15 +105,12 @@
  * DUART Serial Driver.
  * Conflicts with AUART driver which can be set by board.
  */
-#define CONFIG_PL011_SERIAL
 #define CONFIG_PL011_CLOCK		24000000
 #define CONFIG_PL01x_PORTS		{ (void *)MXS_UARTDBG_BASE }
-#define CONFIG_CONS_INDEX		0
 /* Default baudrate can be overridden by board! */
 
 /* FEC Ethernet on SoC */
 #ifdef CONFIG_FEC_MXC
-#define CONFIG_MII
 #ifndef CONFIG_ETHPRIME
 #define CONFIG_ETHPRIME			"FEC0"
 #endif
@@ -138,7 +131,6 @@
 
 /* NAND */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_MXS
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		0x60000000
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
@@ -151,8 +143,6 @@
 
 /* SPI */
 #ifdef CONFIG_CMD_SPI
-#define CONFIG_HARD_SPI
-#define CONFIG_MXS_SPI
 #define CONFIG_SPI_HALF_DUPLEX
 #endif