X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fmx7ulp_evk.h;h=0c3103082cc8e830337f0893bcba1c3098558239;hb=f9a48654ee70fbad29f487d074fd36a1548b4209;hp=532f47ea4f3ab8988fe48e59be2e46d8760bda86;hpb=2be296538e2e9d2893dc495b3fc8f9f6acb1454c;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h index 532f47e..0c31030 100644 --- a/include/configs/mx7ulp_evk.h +++ b/include/configs/mx7ulp_evk.h @@ -1,9 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (C) 2016 Freescale Semiconductor, Inc. * * Configuration settings for the Freescale i.MX7ULP EVK board. - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __MX7ULP_EVK_CONFIG_H @@ -12,42 +11,15 @@ #include #include -/*Uncomment it to use secure boot*/ -/*#define CONFIG_SECURE_BOOT*/ - -#ifdef CONFIG_SECURE_BOOT -#ifndef CONFIG_CSF_SIZE -#define CONFIG_CSF_SIZE 0x4000 -#endif -#endif - #define CONFIG_BOARD_POSTCLK_INIT #define CONFIG_SYS_BOOTM_LEN 0x1000000 -#define SRC_BASE_ADDR CMC1_RBASE -#define IRAM_BASE_ADDR OCRAM_0_BASE -#define IOMUXC_BASE_ADDR IOMUXC1_RBASE - -#define CONFIG_BOUNCE_BUFFER -#define CONFIG_FSL_ESDHC -#define CONFIG_FSL_USDHC -#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ - -#define CONFIG_SYS_FSL_USDHC_NUM 1 - -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */ -#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 -#define CONFIG_ENV_OFFSET (12 * SZ_64K) -#define CONFIG_ENV_SIZE SZ_8K - /* Using ULP WDOG for reset */ #define WDOG_BASE_ADDR WDG1_RBASE -#define CONFIG_SYS_ARCH_TIMER #define CONFIG_SYS_HZ_CLOCK 1000000 /* Fixed at 1Mhz from TSTMR */ #define CONFIG_INITRD_TAG @@ -58,48 +30,25 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M) -#define CONFIG_BOARD_EARLY_INIT_F - /* UART */ #define LPUART_BASE LPUART4_RBASE -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE -#define CONFIG_CONS_INDEX 1 -#define CONFIG_BAUDRATE 115200 - -#undef CONFIG_CMD_IMLS -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE - #define CONFIG_SYS_CACHELINE_SIZE 64 /* Miscellaneous configurable options */ #define CONFIG_SYS_PROMPT "=> " #define CONFIG_SYS_CBSIZE 512 -/* Print Buffer Size */ #define CONFIG_SYS_MAXARGS 256 -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) - -#define CONFIG_CMDLINE_EDITING /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_SYS_TEXT_BASE 0x67800000 #define PHYS_SDRAM 0x60000000 #define PHYS_SDRAM_SIZE SZ_1G -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_CMD_BOOTZ #define CONFIG_LOADADDR 0x60800000 -#define CONFIG_CMD_MEMTEST -#define CONFIG_SYS_MEMTEST_END 0x9E000000 - #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ @@ -186,8 +135,4 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) -#ifndef CONFIG_SYS_DCACHE_OFF -#define CONFIG_CMD_CACHE -#endif - #endif /* __CONFIG_H */