X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fmx6sxsabresd.h;h=df2bd97438ae707e401e09978aef6fd26d300a1b;hb=92832045c54586e9dffa082ff8cd8c2ef6040757;hp=713ebf6ac1c2554955151e9a37bfefcec93c4de1;hpb=d91013034a3222137a5ac4d82aa45f15bd6ff284;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 713ebf6..df2bd97 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -1,24 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2014 Freescale Semiconductor, Inc. * * Configuration settings for the Freescale i.MX6SX Sabresd board. - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H #define __CONFIG_H +#include + #include "mx6_common.h" #ifdef CONFIG_SPL #include "imx6_spl.h" #endif -/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M) - -#define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE #ifdef CONFIG_IMX_BOOTAUX @@ -55,9 +52,9 @@ "boot_fdt=try\0" \ "ip_dyn=yes\0" \ "videomode=video=ctfb:x:800,y:480,depth:24,pclk:29850,le:89,ri:164,up:23,lo:10,hs:10,vs:10,sync:0,vmode:0\0" \ - "mmcdev=2\0" \ + "mmcdev=3\0" \ "mmcpart=1\0" \ - "finduuid=part uuid mmc 2:2 uuid\0" \ + "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=PARTUUID=${uuid} rootwait rw\0" \ "loadbootscript=" \ @@ -124,11 +121,8 @@ "else run netboot; fi" /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000) /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM @@ -143,16 +137,8 @@ /* MMC Configuration */ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR -/* I2C Configs */ -#define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ -#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ -#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ -#define CONFIG_SYS_I2C_SPEED 100000 - /* Network */ #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x1 @@ -160,8 +146,6 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" -#define CONFIG_PHY_ATHEROS - #ifdef CONFIG_CMD_USB #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) @@ -176,38 +160,14 @@ #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1) #endif -#define CONFIG_IMX_THERMAL - -#ifdef CONFIG_FSL_QSPI -#define CONFIG_SYS_FSL_QSPI_LE -#define CONFIG_SYS_FSL_QSPI_AHB -#ifdef CONFIG_MX6SX_SABRESD_REVA -#define FSL_QSPI_FLASH_SIZE SZ_16M -#else -#define FSL_QSPI_FLASH_SIZE SZ_32M -#endif -#define FSL_QSPI_FLASH_NUM 2 -#endif - #ifndef CONFIG_SPL_BUILD -#ifdef CONFIG_VIDEO -#define CONFIG_VIDEO_MXS +#ifdef CONFIG_DM_VIDEO #define CONFIG_VIDEO_LOGO -#define CONFIG_SPLASH_SCREEN -#define CONFIG_SPLASH_SCREEN_ALIGN -#define CONFIG_BMP_16BPP -#define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_VIDEO_BMP_LOGO #define MXS_LCDIF_BASE MX6SX_LCDIF1_BASE_ADDR #endif #endif -#define CONFIG_ENV_OFFSET (14 * SZ_64K) -#define CONFIG_ENV_SIZE SZ_8K - #define CONFIG_SYS_FSL_USDHC_NUM 3 -#if defined(CONFIG_ENV_IS_IN_MMC) -#define CONFIG_SYS_MMC_ENV_DEV 2 /*USDHC4*/ -#endif #endif /* __CONFIG_H */