X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fmx6qsabreauto.h;h=f849f3420a5e08ba402a5b30c0ea35699bdd9e3b;hb=529fb062081e100faae6dc0d163a548b8528ff24;hp=1583c11aab8cd0eb77e531cf1baf2e0267f336b8;hpb=e5f5c4a977c411c0cd3899a4f9487eea77a0e150;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h index 1583c11..f849f34 100644 --- a/include/configs/mx6qsabreauto.h +++ b/include/configs/mx6qsabreauto.h @@ -3,10 +3,7 @@ * * Configuration settings for the Freescale i.MX6Q SabreAuto board. * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __MX6QSABREAUTO_CONFIG_H @@ -14,28 +11,67 @@ #define CONFIG_MACH_TYPE 3529 #define CONFIG_MXC_UART_BASE UART4_BASE -#define CONFIG_CONSOLE_DEV "ttymxc3" -#define CONFIG_DEFAULT_FDT_FILE "imx6q-sabreauto.dtb" +#define CONSOLE_DEV "ttymxc3" #define CONFIG_MMCROOT "/dev/mmcblk0p2" -#define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024) /* USB Configs */ -#define CONFIG_CMD_USB #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_MX6 -#define CONFIG_USB_STORAGE #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_ASIX -#define CONFIG_MXC_USB_PORT 1 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#include "mx6qsabre_common.h" +#define CONFIG_PCA953X +#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x30, 8}, {0x32, 8}, {0x34, 8} } + +#include "mx6sabre_common.h" + +#undef CONFIG_SYS_NO_FLASH +#define CONFIG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR +#define CONFIG_SYS_FLASH_SECT_SIZE (128 * 1024) +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ +#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ +#define CONFIG_FLASH_CFI_DRIVER /* Use drivers/cfi_flash.c */ +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* Use buffered writes*/ +#define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FSL_USDHC_NUM 2 #if defined(CONFIG_ENV_IS_IN_MMC) #define CONFIG_SYS_MMC_ENV_DEV 0 -#define CONFIG_SYS_MMC_ENV_PART 1 /* Boot partition 1 */ #endif +/* I2C Configs */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ +#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ +#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ +#define CONFIG_SYS_I2C_SPEED 100000 + +/* NAND flash command */ +#define CONFIG_CMD_NAND +#define CONFIG_CMD_NAND_TRIMFFS + +/* NAND stuff */ +#define CONFIG_NAND_MXS +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_ONFI_DETECTION + +/* DMA stuff, needed for GPMI/MXS NAND support */ +#define CONFIG_APBH_DMA +#define CONFIG_APBH_DMA_BURST +#define CONFIG_APBH_DMA_BURST8 + +/* PMIC */ +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_POWER_PFUZE100 +#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 + #endif /* __MX6QSABREAUTO_CONFIG_H */