X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fmx53cx9020.h;h=3ed5ee3c57e272784a08a98222df6f0a97c947d2;hb=29d280c88a1ff331dce2d4c7a5aaf2402aa0fd8a;hp=87c75d4e53454cd69dbaaef2246ccee7844f864c;hpb=36737f22b78a475c6bbc8a0467b51e4d95b52a7d;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h index 87c75d4..3ed5ee3 100644 --- a/include/configs/mx53cx9020.h +++ b/include/configs/mx53cx9020.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (C) 2015 Beckhoff Automation GmbH & Co. KG * Patrick Bruenn @@ -6,8 +7,6 @@ * * Based on Freescale's Linux i.MX mx53loco.h file: * Copyright (C) 2010-2011 Freescale Semiconductor. - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H @@ -24,9 +23,6 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) -#define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_BOARD_LATE_INIT -#define CONFIG_MXC_GPIO #define CONFIG_REVISION_TAG #define CONFIG_MXC_UART_BASE UART2_BASE @@ -34,48 +30,33 @@ #define CONFIG_FPGA_COUNT 1 /* MMC Configs */ -#define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_NUM 2 -#define CONFIG_MMC -#define CONFIG_GENERIC_MMC - /* bootz: zImage/initrd.img support */ -#define CONFIG_DOS_PARTITION /* Eth Configs */ -#define CONFIG_MII #define IMX_FEC_BASE FEC_BASE_ADDR #define CONFIG_ETHPRIME "FEC0" #define CONFIG_FEC_MXC_PHYADDR 0x1F /* USB Configs */ -#define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_MX5 -#define CONFIG_USB_STORAGE -#define CONFIG_USB_HOST_ETHER -#define CONFIG_USB_ETHER_ASIX -#define CONFIG_USB_ETHER_MCS7830 -#define CONFIG_USB_ETHER_SMSC95XX #define CONFIG_MXC_USB_PORT 1 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE -#define CONFIG_CONS_INDEX 1 -#define CONFIG_BAUDRATE 115200 /* Command definition */ -#define CONFIG_SUPPORT_RAW_INITRD #define CONFIG_LOADADDR 0x70010000 /* loadaddr env var */ -#define CONFIG_SYS_TEXT_BASE 0x77800000 #define CONFIG_EXTRA_ENV_SETTINGS \ - "fdt_addr=0x71ff0000\0" \ - "rdaddr=0x72000000\0" \ + "fdt_addr_r=0x71ff0000\0" \ + "pxefile_addr_r=0x73000000\0" \ + "ramdisk_addr_r=0x72000000\0" \ "console=ttymxc1,115200\0" \ "uenv=/boot/uEnv.txt\0" \ "optargs=\0" \ @@ -89,10 +70,11 @@ "rootfstype=${mmcrootfstype} " \ "${cmdline}\0" \ "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ - "loadrd=load mmc ${bootpart} ${rdaddr} ${bootdir}/${rdfile};" \ + "loadpxe=dhcp;setenv kernel_addr_r ${loadaddr};pxe get;pxe boot;\0" \ + "loadrd=load mmc ${bootpart} ${ramdisk_addr_r} ${bootdir}/${rdfile};" \ "setenv rdsize ${filesize}\0" \ "loadfdt=echo loading ${fdt_path} ...;" \ - "load mmc ${bootpart} ${fdt_addr} ${fdt_path}\0" \ + "load mmc ${bootpart} ${fdt_addr_r} ${fdt_path}\0" \ "mmcboot=mmc dev ${mmcdev}; " \ "if mmc rescan; then " \ "echo SD/MMC found on device ${mmcdev};" \ @@ -136,8 +118,11 @@ "fi;" \ "run mmcargs;" \ "echo debug: [${bootargs}] ... ;" \ - "echo debug: [bootz ${loadaddr} - ${fdt_addr}] ... ;" \ - "bootz ${loadaddr} - ${fdt_addr}; " \ + "echo debug: [bootz ${loadaddr} - ${fdt_addr_r}];" \ + "bootz ${loadaddr} - ${fdt_addr_r}; " \ + "else " \ + "echo loading from dhcp ...; " \ + "run loadpxe; " \ "fi;\0" #define CONFIG_BOOTCOMMAND \ @@ -146,22 +131,14 @@ #define CONFIG_ARP_TIMEOUT 200UL /* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - #define CONFIG_SYS_MEMTEST_START 0x70000000 #define CONFIG_SYS_MEMTEST_END 0x70010000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_CMDLINE_EDITING - /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 CSD0_BASE_ADDR #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) #define PHYS_SDRAM_2 CSD1_BASE_ADDR @@ -177,12 +154,9 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) -/* FLASH and environment organization */ -#define CONFIG_SYS_NO_FLASH - +/* environment organization */ #define CONFIG_ENV_OFFSET (6 * 64 * 1024) #define CONFIG_ENV_SIZE (8 * 1024) -#define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 /* Framebuffer and LCD */ @@ -193,6 +167,5 @@ #define CONFIG_SPLASH_SCREEN #define CONFIG_BMP_16BPP #define CONFIG_VIDEO_LOGO -#define CONFIG_IPUV3_CLK 200000000 #endif /* __CONFIG_H */