X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fmx51evk.h;h=dff54d04a6783d0799f80078504cfd13a4a185b5;hb=dd11fdc31fb82f63258c1970a6d8d22b8ffd3173;hp=f18ea7be3007e7719c39412c432ce347253f81a9;hpb=64cfeda8ae2e95751c5d2dfa4dc4a906478ae2f6;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index f18ea7b..dff54d0 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -12,43 +12,34 @@ /* High Level Configuration Options */ -#define CONFIG_SYS_FSL_CLK - #include /* * Hardware drivers */ -#define CONFIG_FSL_IIM -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE /* PMIC Controller */ -#define CONFIG_POWER_SPI -#define CONFIG_POWER_FSL -#define CONFIG_FSL_PMIC_BUS 0 -#define CONFIG_FSL_PMIC_CS 0 -#define CONFIG_FSL_PMIC_CLK 2500000 -#define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) -#define CONFIG_FSL_PMIC_BITLEN 32 -#define CONFIG_RTC_MC13XXX +#define CFG_FSL_PMIC_BUS 0 +#define CFG_FSL_PMIC_CS 0 +#define CFG_FSL_PMIC_CLK 2500000 +#define CFG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) +#define CFG_FSL_PMIC_BITLEN 32 /* * MMC Configs * */ -#define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR -#define CONFIG_SYS_FSL_ESDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR /* USB Configs */ -#define CONFIG_MXC_USB_PORT 1 -#define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI -#define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED +#define CFG_MXC_USB_PORT 1 +#define CFG_MXC_USB_PORTSC PORT_PTS_ULPI +#define CFG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED /* Framebuffer and LCD */ -#define CONFIG_ETHPRIME "FEC0" - -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ "fdt_file=imx51-babbage.dtb\0" \ @@ -107,8 +98,6 @@ "bootz; " \ "fi;\0" -#define CONFIG_ARP_TIMEOUT 200UL - /* * Miscellaneous configurable options */ @@ -119,34 +108,16 @@ #define PHYS_SDRAM_1 CSD0_BASE_ADDR #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) -#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) -#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) -#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) +#define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1) +#define CFG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) +#define CFG_SYS_INIT_RAM_SIZE (IRAM_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - -#define CONFIG_SYS_DDR_CLKSEL 0 -#define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 -#define CONFIG_SYS_MAIN_PWR_ON +#define CFG_SYS_DDR_CLKSEL 0 +#define CFG_SYS_CLKTL_CBCDR 0x59E35100 +#define CFG_SYS_MAIN_PWR_ON /*----------------------------------------------------------------------- * environment organization */ -/* - * Environment starts at CONFIG_ENV_OFFSET=0xC0000 = 768k = 768 * 1024 = 786432 - * - * Detect overlap between U-Boot image and environment area in build-time - * - * CONFIG_BOARD_SIZE_LIMIT = CONFIG_ENV_OFFSET - u-boot.imx offset - * CONFIG_BOARD_SIZE_LIMIT = 768k - 1k = 767k = 785408 - * - * Currently CONFIG_BOARD_SIZE_LIMIT does not handle expressions, so - * write the direct value here - */ -#define CONFIG_BOARD_SIZE_LIMIT 785408 - #endif