X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fmx31pdk.h;h=4765764f83a9edebf8e38ef9d26e9aeffc81fcb9;hb=10d3e90f46feace58f4141b696d91644e594e3ed;hp=2bb24a1545e396e855354c06780ff2f4a93ecd07;hpb=470135be276b2d92c6da464c68839202d4ff0d08;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 2bb24a1..4765764 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * (C) Copyright 2008 Magnus Lilja * @@ -7,8 +8,6 @@ * Kshitij Gupta * * Configuration settings for the Freescale i.MX31 PDK board. - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H @@ -17,8 +16,6 @@ #include /* High Level Configuration Options */ -#define CONFIG_MX31 /* This is a mx31 */ - #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG @@ -29,7 +26,6 @@ #define CONFIG_SPL_MAX_SIZE 2048 #define CONFIG_SPL_TEXT_BASE 0x87dc0000 -#define CONFIG_SYS_TEXT_BASE 0x87e00000 #ifndef CONFIG_SPL_BUILD #define CONFIG_SKIP_LOWLEVEL_INIT @@ -46,10 +42,7 @@ #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE -#define CONFIG_MXC_GPIO -#define CONFIG_HARD_SPI -#define CONFIG_MXC_SPI #define CONFIG_DEFAULT_SPI_BUS 1 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) @@ -66,7 +59,6 @@ /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE -#define CONFIG_CONS_INDEX 1 #define CONFIG_EXTRA_ENV_SETTINGS \ "bootargs_base=setenv bootargs console=ttymxc0,115200\0" \ @@ -79,19 +71,9 @@ "nand erase 0x0 0x40000; " \ "nand write 0x81000000 0x0 0x40000\0" -#define CONFIG_SMC911X -#define CONFIG_SMC911X_BASE 0xB6000000 -#define CONFIG_SMC911X_32_BIT - /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -/* max number of command args */ -#define CONFIG_SYS_MAXARGS 16 -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* memtest works on */ #define CONFIG_SYS_MEMTEST_START 0x80000000 @@ -100,12 +82,9 @@ /* default load address */ #define CONFIG_SYS_LOAD_ADDR 0x81000000 -#define CONFIG_CMDLINE_EDITING - /*----------------------------------------------------------------------- * Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 CSD0_BASE #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) @@ -127,7 +106,6 @@ /* * NAND driver */ -#define CONFIG_NAND_MXC #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR