X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fmx31pdk.h;h=04e3b8ff28ce6220f0daa1abc76fe83e7005dae1;hb=b4ee6daad7a2604ca9466b2ba48de86cc27d381f;hp=e45649f566ad145a08bc7d5b87d15fc0c737801f;hpb=c9032ce168c1344fe8ffe8604825ec343ec14adf;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index e45649f..04e3b8f 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * (C) Copyright 2008 Magnus Lilja * @@ -7,8 +8,6 @@ * Kshitij Gupta * * Configuration settings for the Freescale i.MX31 PDK board. - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H @@ -17,8 +16,6 @@ #include /* High Level Configuration Options */ -#define CONFIG_MX31 /* This is a mx31 */ - #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG @@ -26,12 +23,8 @@ #define CONFIG_MACH_TYPE MACH_TYPE_MX31_3DS #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds" #define CONFIG_SPL_MAX_SIZE 2048 -#define CONFIG_SPL_TEXT_BASE 0x87dc0000 -#define CONFIG_SYS_TEXT_BASE 0x87e00000 - #ifndef CONFIG_SPL_BUILD #define CONFIG_SKIP_LOWLEVEL_INIT #endif @@ -47,12 +40,6 @@ #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE -#define CONFIG_MXC_GPIO - -#define CONFIG_HARD_SPI -#define CONFIG_MXC_SPI -#define CONFIG_DEFAULT_SPI_BUS 1 -#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) /* PMIC Controller */ #define CONFIG_POWER @@ -67,13 +54,6 @@ /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE -#define CONFIG_CONS_INDEX 1 - -/*********************************************************** - * Command definition - ***********************************************************/ -#define CONFIG_CMD_NAND - #define CONFIG_EXTRA_ENV_SETTINGS \ "bootargs_base=setenv bootargs console=ttymxc0,115200\0" \ @@ -86,19 +66,9 @@ "nand erase 0x0 0x40000; " \ "nand write 0x81000000 0x0 0x40000\0" -#define CONFIG_SMC911X -#define CONFIG_SMC911X_BASE 0xB6000000 -#define CONFIG_SMC911X_32_BIT - /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -/* max number of command args */ -#define CONFIG_SYS_MAXARGS 16 -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* memtest works on */ #define CONFIG_SYS_MEMTEST_START 0x80000000 @@ -107,12 +77,9 @@ /* default load address */ #define CONFIG_SYS_LOAD_ADDR 0x81000000 -#define CONFIG_CMDLINE_EDITING - /*----------------------------------------------------------------------- * Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 CSD0_BASE #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) @@ -127,7 +94,6 @@ /* * environment organization */ -#define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_OFFSET 0x40000 #define CONFIG_ENV_OFFSET_REDUND 0x60000 #define CONFIG_ENV_SIZE (128 * 1024) @@ -135,7 +101,6 @@ /* * NAND driver */ -#define CONFIG_NAND_MXC #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR