X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fmx31ads.h;h=57955dfc3b09ffb6fbd5ea29da66bd27a513f5b7;hb=37a3bda0c9c8a2ffbf7e2a9e121177a3385a0626;hp=b904d814da75e49d0c1cec8faa0bfeadf68306ab;hpb=508eb85db7065e34948c189c83f7e348c1cfd61e;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h index b904d81..57955df 100644 --- a/include/configs/mx31ads.h +++ b/include/configs/mx31ads.h @@ -50,31 +50,33 @@ /* * Size of malloc() pool */ -#define CFG_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) -#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ /* * Hardware drivers */ -#define CONFIG_MX31_UART 1 -#define CFG_MX31_UART1 1 +#define CONFIG_MXC_UART 1 +#define CONFIG_SYS_MX31_UART1 1 #define CONFIG_HARD_SPI 1 #define CONFIG_MXC_SPI 1 #define CONFIG_DEFAULT_SPI_BUS 1 -#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_2 | SPI_CS_HIGH) +#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) +#define CONFIG_FSL_PMIC +#define CONFIG_FSL_PMIC_BUS 1 +#define CONFIG_FSL_PMIC_CS 0 +#define CONFIG_FSL_PMIC_CLK 1000000 +#define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) #define CONFIG_RTC_MC13783 1 -/* MC13783 connected to CSPI2 and SS0 */ -#define CONFIG_MC13783_SPI_BUS 1 -#define CONFIG_MC13783_SPI_CS 0 /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 115200 -#define CFG_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} +#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} /*********************************************************** * Command definition @@ -109,9 +111,10 @@ "cp.b ${loadaddr} ${uboot_addr} ${filesize}; " \ "setenv filesize; saveenv\0" -#define CONFIG_DRIVER_CS8900 1 -#define CS8900_BASE 0xb4020300 -#define CS8900_BUS16 1 /* follow the Linux driver */ +#define CONFIG_NET_MULTI +#define CONFIG_CS8900 +#define CONFIG_CS8900_BASE 0xb4020300 +#define CONFIG_CS8900_BUS16 1 /* follow the Linux driver */ /* * The MX31ADS board seems to have a hardware "peculiarity" confirmed under @@ -128,22 +131,20 @@ /* * Miscellaneous configurable options */ -#define CFG_LONGHELP /* undef to save memory */ -#define CFG_PROMPT "=> " -#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "=> " +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ /* Print Buffer Size */ -#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) -#define CFG_MAXARGS 16 /* max number of command args */ -#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#define CFG_MEMTEST_START 0 /* memtest works on */ -#define CFG_MEMTEST_END 0x10000 +#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x10000 -#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CFG_LOAD_ADDR CONFIG_LOADADDR - -#define CFG_HZ CONFIG_MX31_CLK32 /* use 32kHz clock as source */ +#define CONFIG_SYS_HZ 1000 #define CONFIG_CMDLINE_EDITING 1 @@ -164,11 +165,11 @@ /*----------------------------------------------------------------------- * FLASH and environment organization */ -#define CFG_FLASH_BASE CS0_BASE -#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CFG_MAX_FLASH_SECT 262 /* max number of sectors on one chip */ -#define CFG_MONITOR_BASE CFG_FLASH_BASE /* Monitor at beginning of flash */ -#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256KiB */ +#define CONFIG_SYS_FLASH_BASE CS0_BASE +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 262 /* max number of sectors on one chip */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */ +#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256KiB */ #define CONFIG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_SECT_SIZE (32 * 1024) @@ -182,21 +183,21 @@ * The rest of 32MiB is in 128KiB big sectors. U-Boot occupies the low 4 sectors, * if we put environment next to it, we will have to occupy 128KiB for it. * Putting it at the top of flash we use only 32KiB. */ -#define CONFIG_ENV_ADDR (CFG_MONITOR_BASE + CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_ENV_SECT_SIZE) /*----------------------------------------------------------------------- * CFI FLASH driver setup */ -#define CFG_FLASH_CFI 1 /* Flash memory is CFI compliant */ +#define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */ #define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */ #define CONFIG_FLASH_SPANSION_S29WS_N 1 /* A non-standard buffered write algorithm */ -#define CFG_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */ -#define CFG_FLASH_PROTECTION 1 /* Use hardware sector protection */ +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */ +#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */ /* * JFFS2 partitions */ -#undef CONFIG_JFFS2_CMDLINE +#undef CONFIG_CMD_MTDPARTS #define CONFIG_JFFS2_DEV "nor0" #endif /* __CONFIG_H */