X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fmx1ads.h;h=c15d54631a592dadbbb65eb6cdcf989a2c2b1edd;hb=70672a29597c4ca4734f2d94bf1df7227b9c7604;hp=f136b0ca8c6e2b8487edfcdaa3086c609265b1e2;hpb=f61f1e150c84f5b9347fca79a4bc5f2286c545d2;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/mx1ads.h b/include/configs/mx1ads.h
index f136b0c..c15d546 100644
--- a/include/configs/mx1ads.h
+++ b/include/configs/mx1ads.h
@@ -9,20 +9,7 @@
  *
  * This is the Configuration setting for Motorola MX1ADS board
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -35,16 +22,16 @@
 #define CONFIG_ARM920T		1	/* This is an ARM920T Core		*/
 #define CONFIG_IMX		1	/* It's a Motorola MC9328 SoC		*/
 #define CONFIG_MX1ADS		1	/* on a Motorola MX1ADS Board		*/
-#undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff		*/
 
 /*
  * Select serial console configuration
   */
+#define CONFIG_IMX_SERIAL
 #define CONFIG_IMX_SERIAL1		/* internal uart 1 */
 /* #define _CONFIG_UART2 */		/* internal uart 2 */
 /* #define CONFIG_SILENT_CONSOLE */	/* use this to disable output */
 
-#define BOARD_LATE_INIT		1
+#define CONFIG_BOARD_LATE_INIT
 #define USE_920T_MMU		1
 
 #if 0
@@ -59,15 +46,12 @@
 
 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128*1024)
 
-
-#define CONFIG_SYS_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
-
 /*
  *  CS8900 Ethernet drivers
  */
-#define CONFIG_DRIVER_CS8900	1	/* we have a CS8900 on-board */
-#define CS8900_BASE		0x15000300
-#define CS8900_BUS16		1	/* the Linux driver does accesses as shorts */
+#define CONFIG_CS8900		/* we have a CS8900 on-board */
+#define CONFIG_CS8900_BASE	0x15000300
+#define CONFIG_CS8900_BUS16	/* the Linux driver does accesses as shorts */
 
 /*
  * select serial console configuration
@@ -78,7 +62,6 @@
 
 #define CONFIG_BAUDRATE		115200
 
-
 /*
  * BOOTP options
  */
@@ -87,7 +70,6 @@
 #define CONFIG_BOOTP_GATEWAY
 #define CONFIG_BOOTP_HOSTNAME
 
-
 /*
  * Command line configuration.
  */
@@ -97,7 +79,6 @@
 #define CONFIG_CMD_REGINFO
 #define CONFIG_CMD_ELF
 
-
 #define CONFIG_BOOTDELAY	3
 #define CONFIG_BOOTARGS		"root=/dev/msdk mem=48M"
 #define CONFIG_BOOTFILE		"mx1ads"
@@ -114,7 +95,6 @@
  */
 
 #define CONFIG_SYS_HUSH_PARSER		1
-#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
 
 #define CONFIG_SYS_LONGHELP				/* undef to save memory		*/
 
@@ -133,26 +113,10 @@
 #define CONFIG_SYS_MEMTEST_START	0x09000000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0x0AF00000	/* 63 MB in DRAM	*/
 
-#undef	CONFIG_SYS_CLKS_IN_HZ				/* everything, incl board info, in Hz */
 #define CONFIG_SYS_LOAD_ADDR		0x08800000	/* default load address */
-/*#define	CONFIG_SYS_HZ			1000 */
 #define CONFIG_SYS_HZ			3686400
 #define CONFIG_SYS_CPUSPEED		0x141
 
-/* valid baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
-
-/*-----------------------------------------------------------------------
- * Stack sizes
- *
- * The stack sizes are set up in start.S using the settings below
- */
-#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
-#ifdef CONFIG_USE_IRQ
-#define CONFIG_STACKSIZE_IRQ	(4*1024)	/* IRQ stack */
-#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
-#endif
-
 /*-----------------------------------------------------------------------
  * Physical Memory Map
  */
@@ -161,6 +125,16 @@
 #define PHYS_SDRAM_1		0x08000000	/* SDRAM  on CSD0		*/
 #define PHYS_SDRAM_1_SIZE	0x04000000	/* 64 MB			*/
 
+#define CONFIG_SYS_TEXT_BASE	0x10000000
+
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR	0x00300000
+#define CONFIG_SYS_INIT_RAM_SIZE	0x000FFFFF
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
+						GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_INIT_RAM_ADDR + \
+						CONFIG_SYS_GBL_DATA_OFFSET)
+
 #define CONFIG_SYS_MAX_FLASH_BANKS	1		/* 1 bank of SyncFlash		*/
 #define CONFIG_SYS_FLASH_BASE		0x0C000000	/* SyncFlash on CSD1		*/
 #define FLASH_BANK_SIZE		0x01000000	/* 16 MB Total			*/