X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fmpr2.h;h=e8594966e0b9f8f2c04c39e9659e7f278a332ecd;hb=87f78478a4a1bf574db0b0e575ca37cf91fb187c;hp=5b37277cceabb26d7f2de7a56b98ca188fae1d21;hpb=0ddc9c172279f686077310fbcfa5baf10c719188;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/mpr2.h b/include/configs/mpr2.h
index 5b37277..e859496 100644
--- a/include/configs/mpr2.h
+++ b/include/configs/mpr2.h
@@ -1,10 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Configuation settings for MPR2
  *
  * Copyright (C) 2008
  * Mark Jonas <mark.jonas@de.bosch.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __MPR2_H
@@ -13,30 +12,21 @@
 /* Supported commands */
 
 /* Default environment variables */
-#define CONFIG_BOOTARGS		"console=ttySC0,115200"
 #define CONFIG_BOOTFILE		"/boot/zImage"
 #define CONFIG_LOADADDR		0x8E000000
 
 /* CPU and platform */
 #define CONFIG_CPU_SH7720	1
-#define CONFIG_MPR2		1
 
 #define CONFIG_DISPLAY_BOARDINFO
 
 /* U-Boot internals */
-#define CONFIG_SYS_LONGHELP			/* undef to save memory	*/
-#define CONFIG_SYS_CBSIZE		256	/* Buffer size for input from the Console */
-#define CONFIG_SYS_PBSIZE		256	/* Buffer size for Console output */
-#define CONFIG_SYS_MAXARGS		16	/* max args accepted for monitor commands */
-#define CONFIG_SYS_BARGSIZE		512	/* Buffer size for Boot Arguments passed to kernel */
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }	/* List of legal baudrate settings for this board */
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024)
 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_MONITOR_LEN		(128 * 1024)
 #define CONFIG_SYS_MALLOC_LEN		(256 * 1024)
 
-#define CONFIG_SYS_TEXT_BASE	0x8FFC0000
-
 /* Memory */
 #define CONFIG_SYS_SDRAM_BASE		0x8C000000
 #define CONFIG_SYS_SDRAM_SIZE		(64 * 1024 * 1024)
@@ -44,8 +34,6 @@
 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
 
 /* Flash */
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER
 #define CONFIG_SYS_FLASH_EMPTY_INFO
 #define CONFIG_SYS_FLASH_BASE		0xA0000000
 #define CONFIG_SYS_MAX_FLASH_SECT	256
@@ -59,12 +47,9 @@
 
 /* Clocks */
 #define CONFIG_SYS_CLK_FREQ	24000000
-#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
-#define CONFIG_SYS_TMU_CLK_DIV		4	/* 4 (default), 16, 64, 256 or 1024 */
 
 /* UART */
-#define CONFIG_SCIF_CONSOLE	1
 #define CONFIG_CONS_SCIF0	1
 
 #endif	/* __MPR2_H */