X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fmimc200.h;h=fc7ecfaee47605af7055ea6c3be2c429543496da;hb=23c5d253d5fa4586e2342934a0a8ec21c1f21a36;hp=2eb9ebc29074920b08d590dcb2a57e098899e72c;hpb=ea393eb1d6a786fc2e895f90abb5f7e7541aef45;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/mimc200.h b/include/configs/mimc200.h index 2eb9ebc..fc7ecfa 100644 --- a/include/configs/mimc200.h +++ b/include/configs/mimc200.h @@ -3,45 +3,26 @@ * * Configuration settings for the AVR32 Network Gateway * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H #define __CONFIG_H -#include - -#define CONFIG_AVR32 1 -#define CONFIG_AT32AP 1 -#define CONFIG_AT32AP7000 1 -#define CONFIG_MIMC200 1 +#include -#define CONFIG_MIMC200_EXT_FLASH 1 +#define CONFIG_AT32AP +#define CONFIG_AT32AP7000 +#define CONFIG_MIMC200 -#define CONFIG_SYS_HZ 1000 +#define CONFIG_MIMC200_EXT_FLASH /* * Set up the PLL to run at 140 MHz, the CPU to run at the PLL * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency * and the PBA bus to run at 1/4 the PLL frequency. */ -#define CONFIG_PLL 1 -#define CONFIG_SYS_POWER_MANAGER 1 +#define CONFIG_PLL +#define CONFIG_SYS_POWER_MANAGER #define CONFIG_SYS_OSC0_HZ 10000000 #define CONFIG_SYS_PLL0_DIV 1 #define CONFIG_SYS_PLL0_MUL 15 @@ -51,6 +32,9 @@ #define CONFIG_SYS_CLKDIV_PBA 2 #define CONFIG_SYS_CLKDIV_PBB 1 +/* Reserve VM regions for SDRAM, NOR flash and FRAM */ +#define CONFIG_SYS_NR_VM_REGIONS 3 + /* * The PLLOPT register controls the PLL like this: * icp = PLLOPT<2> @@ -60,43 +44,46 @@ */ #define CONFIG_SYS_PLL0_OPT 0x04 -#define CONFIG_USART1 1 +#define CONFIG_USART_BASE ATMEL_BASE_USART1 +#define CONFIG_USART_ID 1 + #define CONFIG_MIMC200_DBGLINK 1 /* User serviceable stuff */ -#define CONFIG_DOS_PARTITION 1 +#define CONFIG_DOS_PARTITION -#define CONFIG_CMDLINE_TAG 1 -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG #define CONFIG_STACKSIZE (2048) #define CONFIG_BAUDRATE 115200 #define CONFIG_BOOTARGS \ - "console=ttyS0 root=/dev/mtdblock1 fbmem=600k rootfstype=jffs2" + "root=/dev/mtdblock1 rootfstype=jffs2 fbmem=512k console=ttyS1" #define CONFIG_BOOTCOMMAND \ - "fsload; bootm" + "fsload boot/uImage; bootm" -#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */ -#define CONFIG_SILENT_CONSOLE_INPUT 1 /* disable console inputs */ -#define CONFIG_SYS_DEVICE_NULLDEV 1 /* include nulldev device */ +#define CONFIG_SILENT_CONSOLE /* enable silent startup */ +#define CONFIG_DISABLE_CONSOLE /* disable console */ +#define CONFIG_SYS_DEVICE_NULLDEV /* include nulldev device */ + +#define CONFIG_LCD 1 /* * Only interrupt autoboot if is pressed. Otherwise, garbage * data on the serial line may interrupt the boot sequence. */ #define CONFIG_BOOTDELAY 0 -#define CONFIG_ZERO_BOOTDELAY_CHECK 1 -#define CONFIG_AUTOBOOT 1 +#define CONFIG_ZERO_BOOTDELAY_CHECK +#define CONFIG_AUTOBOOT /* * After booting the board for the first time, new ethernet addresses * should be generated and assigned to the environment variables * "ethaddr" and "eth1addr". This is normally done during production. */ -#define CONFIG_OVERWRITE_ETHADDR_ONCE 1 -#define CONFIG_NET_MULTI 1 +#define CONFIG_OVERWRITE_ETHADDR_ONCE /* * BOOTP/DHCP options @@ -104,8 +91,6 @@ #define CONFIG_BOOTP_SUBNETMASK #define CONFIG_BOOTP_GATEWAY -#define CONFIG_DOS_PARTITION 1 - /* * Command line configuration. */ @@ -119,21 +104,36 @@ #define CONFIG_CMD_MMC #define CONFIG_CMD_NET -#define CONFIG_ATMEL_USART 1 -#define CONFIG_MACB 1 -#define CONFIG_PORTMUX_PIO 1 +#define CONFIG_ATMEL_USART +#define CONFIG_MACB +#define CONFIG_PORTMUX_PIO #define CONFIG_SYS_NR_PIOS 5 -#define CONFIG_SYS_HSDRAMC 1 -#define CONFIG_MMC 1 -#define CONFIG_ATMEL_MCI 1 +#define CONFIG_SYS_HSDRAMC +#define CONFIG_MMC +#define CONFIG_GENERIC_ATMEL_MCI +#define CONFIG_GENERIC_MMC + +#if defined(CONFIG_LCD) +#define CONFIG_CMD_BMP +#define CONFIG_ATMEL_LCD 1 +#define LCD_BPP LCD_COLOR16 +#define CONFIG_BMP_16BPP 1 +#define CONFIG_FB_ADDR 0x10600000 +#define CONFIG_WHITE_ON_BLACK 1 +#define CONFIG_VIDEO_BMP_GZIP 1 +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE 262144 +#define CONFIG_ATMEL_LCD_BGR555 1 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 +#define CONFIG_SPLASH_SCREEN 1 +#endif #define CONFIG_SYS_DCACHE_LINESZ 32 #define CONFIG_SYS_ICACHE_LINESZ 32 #define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_BASE 0x00000000 #define CONFIG_SYS_FLASH_SIZE 0x800000 @@ -141,6 +141,7 @@ #define CONFIG_SYS_MAX_FLASH_SECT 135 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_TEXT_BASE 0x00000000 #define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE #define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE @@ -149,7 +150,7 @@ #define CONFIG_SYS_FRAM_BASE 0x08000000 #define CONFIG_SYS_FRAM_SIZE 0x20000 -#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_SIZE 65536 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE) @@ -167,7 +168,7 @@ #define CONFIG_SYS_CBSIZE 256 #define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LONGHELP 1 +#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1f00000)