X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fmicroblaze-generic.h;h=8ca0e83c78336e90e9032843a686a1535c172bc9;hb=f9a48654ee70fbad29f487d074fd36a1548b4209;hp=926a8f65261164a3fe0bcc6b1626cf02051463b1;hpb=72c3033fd1da878aec6b23eb9086a83f57d54eee;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 926a8f6..8ca0e83 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -1,9 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * (C) Copyright 2007-2010 Michal Simek * * Michal SIMEK - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H @@ -14,22 +13,18 @@ /* MicroBlaze CPU */ #define MICROBLAZE_V5 1 +#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) + /* linear and spi flash memory */ #ifdef XILINX_FLASH_START #define FLASH #undef SPIFLASH #undef RAMENV /* hold environment in flash */ #else -#ifdef XILINX_SPI_FLASH_BASEADDR -#undef FLASH -#define SPIFLASH -#undef RAMENV /* hold environment in flash */ -#else #undef FLASH #undef SPIFLASH #define RAMENV /* hold environment in RAM */ #endif -#endif /* uart */ /* The following table includes the supported baudrates */ @@ -39,22 +34,6 @@ /* setting reset address */ /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/ -/* gpio */ -#ifdef XILINX_GPIO_BASEADDR -# define CONFIG_XILINX_GPIO -# define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR -#endif - -/* watchdog */ -#if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ) -# define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR -# define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ -# ifndef CONFIG_SPL_BUILD -# define CONFIG_HW_WATCHDOG -# define CONFIG_XILINX_TB_WATCHDOG -# endif -#endif - #define CONFIG_SYS_MALLOC_LEN 0xC0000 /* Stack location before relocation */ @@ -82,8 +61,6 @@ #ifdef FLASH # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE -# define CONFIG_SYS_FLASH_CFI 1 -# define CONFIG_FLASH_CFI_DRIVER 1 /* ?empty sector */ # define CONFIG_SYS_FLASH_EMPTY_INFO 1 /* max number of memory banks */ @@ -91,51 +68,28 @@ /* max number of sectors on one chip */ # define CONFIG_SYS_MAX_FLASH_SECT 512 /* hardware flash protection */ -# define CONFIG_SYS_FLASH_PROTECTION /* use buffered writes (20x faster) */ -# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 # ifdef RAMENV -# define CONFIG_ENV_SIZE 0x1000 -# define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) - # else /* FLASH && !RAMENV */ /* 128K(one sector) for env */ -# define CONFIG_ENV_SECT_SIZE 0x20000 -# define CONFIG_ENV_ADDR \ - (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) -# define CONFIG_ENV_SIZE 0x20000 # endif /* FLASH && !RAMBOOT */ #else /* !FLASH */ #ifdef SPIFLASH -# define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR -# define CONFIG_SPI 1 -# define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 -# define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ -# define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS - # ifdef RAMENV -# define CONFIG_ENV_SIZE 0x1000 -# define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) - # else /* SPIFLASH && !RAMENV */ -# define CONFIG_ENV_SPI_MODE SPI_MODE_3 -# define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED -# define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS /* 128K(two sectors) for env */ -# define CONFIG_ENV_SECT_SIZE 0x10000 -# define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE) /* Warning: adjust the offset in respect of other flash content and size */ -# define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */ # endif /* SPIFLASH && !RAMBOOT */ #else /* !SPIFLASH */ /* ENV in RAM */ -# define CONFIG_ENV_SIZE 0x1000 -# define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) #endif /* !SPIFLASH */ #endif /* !FLASH */ +#define XILINX_USE_ICACHE 1 +#define XILINX_USE_DCACHE 1 + #if defined(XILINX_USE_ICACHE) # define CONFIG_ICACHE #else @@ -156,50 +110,26 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - -#if defined(CONFIG_CMD_JFFS2) -# define CONFIG_MTD_PARTITIONS -#endif - -#if defined(CONFIG_CMD_UBI) -# define CONFIG_MTD_PARTITIONS -#endif #if defined(CONFIG_MTD_PARTITIONS) /* MTD partitions */ -#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -#define CONFIG_FLASH_CFI_MTD -#define MTDIDS_DEFAULT "nor0=flash-0" /* default mtd partition table */ -#define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\ - "256k(env),3m(kernel),1m(romfs),"\ - "1m(cramfs),-(jffs2)" #endif /* size of console buffer */ #define CONFIG_SYS_CBSIZE 512 - /* print buffer size */ -#define CONFIG_SYS_PBSIZE \ - (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* max number of command args */ #define CONFIG_SYS_MAXARGS 15 -#define CONFIG_SYS_LONGHELP /* default load address */ #define CONFIG_SYS_LOAD_ADDR 0 -#define CONFIG_BOOTARGS "root=romfs" -#define CONFIG_HOSTNAME XILINX_BOARD_NAME +#define CONFIG_HOSTNAME "microblaze-generic" #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" /* architecture dependent code */ #define CONFIG_SYS_USR_EXCEP /* user exception */ -#define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo" - #ifndef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \ "nor0=flash-0\0"\ @@ -212,30 +142,11 @@ "setenv stdin serial\0" #endif -#define CONFIG_CMDLINE_EDITING - -/* Enable flat device tree support */ -#define CONFIG_LMB 1 - #if defined(CONFIG_XILINX_AXIEMAC) -# define CONFIG_MII 1 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1 -# define CONFIG_PHY_ATHEROS 1 -# define CONFIG_PHY_BROADCOM 1 -# define CONFIG_PHY_DAVICOM 1 -# define CONFIG_PHY_LXT 1 -# define CONFIG_PHY_MARVELL 1 -# define CONFIG_PHY_NATSEMI 1 -# define CONFIG_PHY_REALTEK 1 -# define CONFIG_PHY_VITESSE 1 -#else -# undef CONFIG_MII #endif /* SPL part */ -#define CONFIG_SPL_FRAMEWORK - -#define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds" #ifdef CONFIG_SYS_FLASH_BASE # define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE @@ -245,7 +156,7 @@ #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ 0x40000) -#define CONFIG_SYS_FDT_SIZE (16<<10) +#define CONFIG_SYS_FDT_SIZE (16 << 10) #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \ 0x1000000) @@ -262,8 +173,6 @@ /* Just for sure that there is a space for stack */ #define CONFIG_SPL_STACK_SIZE 0x100 -#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE - #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \ CONFIG_SYS_INIT_RAM_ADDR - \ CONFIG_SYS_MALLOC_F_LEN - \