X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fmicroblaze-generic.h;h=1266cf72faf4cc71b9da8c6726e88a95ad6fd692;hb=3d6ba91e793808d1612152e9f9b8c51b3ca6c926;hp=4c6cc9fef08d4b8e7427e96efd0d0ad8c409ba59;hpb=ef29884b2708a6cce3b77f4ccaeea193d4e02c22;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 4c6cc9f..1266cf7 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2007-2008 Michal Simek + * (C) Copyright 2007-2010 Michal Simek * * Michal SIMEK * @@ -27,76 +27,106 @@ #include "../board/xilinx/microblaze-generic/xparameters.h" -#define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */ +/* MicroBlaze CPU */ +#define CONFIG_MICROBLAZE 1 #define MICROBLAZE_V5 1 +/* Open Firmware DTS */ +#define CONFIG_OF_CONTROL 1 +#define CONFIG_OF_EMBED 1 +#define CONFIG_DEFAULT_DEVICE_TREE microblaze + +/* linear and spi flash memory */ +#ifdef XILINX_FLASH_START +#define FLASH +#undef SPIFLASH +#undef RAMENV /* hold environment in flash */ +#else +#ifdef XILINX_SPI_FLASH_BASEADDR +#undef FLASH +#define SPIFLASH +#undef RAMENV /* hold environment in flash */ +#else +#undef FLASH +#undef SPIFLASH +#define RAMENV /* hold environment in RAM */ +#endif +#endif + /* uart */ #ifdef XILINX_UARTLITE_BASEADDR - #define CONFIG_XILINX_UARTLITE - #define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR - #define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE - #define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } - #define CONSOLE_ARG "console=console=ttyUL0,115200\0" +# define CONFIG_XILINX_UARTLITE +# define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR +# define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE +# define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } +# define CONSOLE_ARG "console=console=ttyUL0,115200\0" #elif XILINX_UART16550_BASEADDR - #define CONFIG_SYS_NS16550 1 - #define CONFIG_SYS_NS16550_SERIAL - #define CONFIG_SYS_NS16550_REG_SIZE -4 - #define CONFIG_CONS_INDEX 1 - #define CONFIG_SYS_NS16550_COM1 (XILINX_UART16550_BASEADDR + 0x1000 + 0x3) - #define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ - #define CONFIG_BAUDRATE 115200 - - /* The following table includes the supported baudrates */ - #define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} - #define CONSOLE_ARG "console=console=ttyS0,115200\0" +# define CONFIG_SYS_NS16550 1 +# define CONFIG_SYS_NS16550_SERIAL +# if defined(__MICROBLAZEEL__) +# define CONFIG_SYS_NS16550_REG_SIZE -4 +# else +# define CONFIG_SYS_NS16550_REG_SIZE 4 +# endif +# define CONFIG_CONS_INDEX 1 +# define CONFIG_SYS_NS16550_COM1 \ + ((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000) +# define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ +# define CONFIG_BAUDRATE 115200 + +/* The following table includes the supported baudrates */ +# define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} +# define CONSOLE_ARG "console=console=ttyS0,115200\0" #else - #error Undefined uart +# error Undefined uart #endif /* setting reset address */ -/*#define CONFIG_SYS_RESET_ADDRESS TEXT_BASE*/ +/*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/ /* ethernet */ -#ifdef XILINX_EMAC_BASEADDR - #define CONFIG_XILINX_EMAC 1 - #define CONFIG_SYS_ENET -#elif XILINX_EMACLITE_BASEADDR - #define CONFIG_XILINX_EMACLITE 1 - #define CONFIG_SYS_ENET -#elif XILINX_LLTEMAC_BASEADDR - #define CONFIG_XILINX_LL_TEMAC 1 - #define CONFIG_SYS_ENET +#undef CONFIG_SYS_ENET +#if defined(XILINX_EMACLITE_BASEADDR) +# define CONFIG_XILINX_EMACLITE 1 +# define CONFIG_SYS_ENET +#endif +#if defined(XILINX_LLTEMAC_BASEADDR) +# define CONFIG_XILINX_LL_TEMAC 1 +# define CONFIG_SYS_ENET +#endif +#if defined(XILINX_AXIEMAC_BASEADDR) +# define CONFIG_XILINX_AXIEMAC 1 +# define CONFIG_SYS_ENET #endif #undef ET_DEBUG /* gpio */ #ifdef XILINX_GPIO_BASEADDR - #define CONFIG_SYS_GPIO_0 1 - #define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR +# define CONFIG_SYS_GPIO_0 1 +# define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR #endif /* interrupt controller */ #ifdef XILINX_INTC_BASEADDR - #define CONFIG_SYS_INTC_0 1 - #define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR - #define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS +# define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR +# define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS #endif /* timer */ #ifdef XILINX_TIMER_BASEADDR - #if (XILINX_TIMER_IRQ != -1) - #define CONFIG_SYS_TIMER_0 1 - #define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR - #define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ - #define FREQUENCE XILINX_CLOCK_FREQ - #define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 ) - #endif +# if (XILINX_TIMER_IRQ != -1) +# define CONFIG_SYS_TIMER_0 1 +# define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR +# define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ +# define FREQUENCE XILINX_CLOCK_FREQ +# define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 ) +# endif #elif XILINX_CLOCK_FREQ - #define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ +# define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ #else - #error BAD CLOCK FREQ +# error BAD CLOCK FREQ #endif /* FSL */ /* #define CONFIG_SYS_FSL_2 */ @@ -104,25 +134,29 @@ /* * memory layout - Example - * TEXT_BASE = 0x1200_0000; + * CONFIG_SYS_TEXT_BASE = 0x1200_0000; defined in config.mk * CONFIG_SYS_SRAM_BASE = 0x1000_0000; - * CONFIG_SYS_SRAM_SIZE = 0x0400_0000; + * CONFIG_SYS_SRAM_SIZE = 0x0400_0000; 64MB + * + * CONFIG_SYS_MONITOR_LEN = 0x40000 + * CONFIG_SYS_MALLOC_LEN = 3 * CONFIG_SYS_MONITOR_LEN = 0xC0000 * * CONFIG_SYS_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000 - * CONFIG_SYS_MONITOR_BASE = 0x13FF_F000 - 0x40000 = 0x13FB_F000 - * CONFIG_SYS_MALLOC_BASE = 0x13FB_F000 - 0x40000 = 0x13F7_F000 + * CONFIG_SYS_MONITOR_BASE = 0x13FF_F000 - CONFIG_SYS_MONITOR_LEN = 0x13FB_F000 + * CONFIG_SYS_MALLOC_BASE = 0x13FB_F000 - CONFIG_SYS_MALLOC_LEN = 0x13EF_F000 * * 0x1000_0000 CONFIG_SYS_SDRAM_BASE + * MEMTEST_AREA 64kB * FREE - * 0x1200_0000 TEXT_BASE + * 0x1200_0000 CONFIG_SYS_TEXT_BASE * U-BOOT code * 0x1202_0000 * FREE * * STACK - * 0x13F7_F000 CONFIG_SYS_MALLOC_BASE - * MALLOC_AREA 256kB Alloc - * 0x11FB_F000 CONFIG_SYS_MONITOR_BASE + * 0x13EF_F000 CONFIG_SYS_MALLOC_BASE + * MALLOC_AREA 768kB Alloc + * 0x13FB_F000 CONFIG_SYS_MONITOR_BASE * MONITOR_CODE 256kB Env * 0x13FF_F000 CONFIG_SYS_GBL_DATA_OFFSET * GLOBAL_DATA 4kB bd, gd @@ -136,74 +170,129 @@ #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) /* global pointer */ -#define CONFIG_SYS_GBL_DATA_SIZE 0x1000 /* size of global data */ /* start of global data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_GBL_DATA_OFFSET \ + (CONFIG_SYS_SDRAM_SIZE - GENERATED_GBL_DATA_SIZE) /* monitor code */ -#define SIZE 0x40000 +#define SIZE 0x40000 #define CONFIG_SYS_MONITOR_LEN SIZE -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_MONITOR_LEN) -#define CONFIG_SYS_MONITOR_END (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) -#define CONFIG_SYS_MALLOC_LEN SIZE -#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) +#define CONFIG_SYS_MONITOR_BASE \ + (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET \ + - CONFIG_SYS_MONITOR_LEN - GENERATED_BD_INFO_SIZE) +#define CONFIG_SYS_MONITOR_END \ + (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) +#define CONFIG_SYS_MALLOC_LEN (SIZE * 3) +#define CONFIG_SYS_MALLOC_BASE \ + (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) /* stack */ -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MONITOR_BASE +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MALLOC_BASE -/*#define RAMENV */ -#define FLASH +/* + * CFI flash memory layout - Example + * CONFIG_SYS_FLASH_BASE = 0x2200_0000; + * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB + * + * SECT_SIZE = 0x20000; 128kB is one sector + * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store + * + * 0x2200_0000 CONFIG_SYS_FLASH_BASE + * FREE 256kB + * 0x2204_0000 CONFIG_ENV_ADDR + * ENV_AREA 128kB + * 0x2206_0000 + * FREE + * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE + * + */ #ifdef FLASH - #define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START - #define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE - #define CONFIG_SYS_FLASH_CFI 1 - #define CONFIG_FLASH_CFI_DRIVER 1 - #define CONFIG_SYS_FLASH_EMPTY_INFO 1 /* ?empty sector */ - #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ - #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ - #define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */ - - #ifdef RAMENV - #define CONFIG_ENV_IS_NOWHERE 1 - #define CONFIG_ENV_SIZE 0x1000 - #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) - - #else /* !RAMENV */ - #define CONFIG_ENV_IS_IN_FLASH 1 - #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */ - #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) - #define CONFIG_ENV_SIZE 0x20000 - #endif /* !RAMBOOT */ +# define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START +# define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE +# define CONFIG_SYS_FLASH_CFI 1 +# define CONFIG_FLASH_CFI_DRIVER 1 +/* ?empty sector */ +# define CONFIG_SYS_FLASH_EMPTY_INFO 1 +/* max number of memory banks */ +# define CONFIG_SYS_MAX_FLASH_BANKS 1 +/* max number of sectors on one chip */ +# define CONFIG_SYS_MAX_FLASH_SECT 512 +/* hardware flash protection */ +# define CONFIG_SYS_FLASH_PROTECTION + +# ifdef RAMENV +# define CONFIG_ENV_IS_NOWHERE 1 +# define CONFIG_ENV_SIZE 0x1000 +# define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) + +# else /* FLASH && !RAMENV */ +# define CONFIG_ENV_IS_IN_FLASH 1 +/* 128K(one sector) for env */ +# define CONFIG_ENV_SECT_SIZE 0x20000 +# define CONFIG_ENV_ADDR \ + (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) +# define CONFIG_ENV_SIZE 0x20000 +# endif /* FLASH && !RAMBOOT */ #else /* !FLASH */ - /* ENV in RAM */ - #define CONFIG_SYS_NO_FLASH 1 - #define CONFIG_ENV_IS_NOWHERE 1 - #define CONFIG_ENV_SIZE 0x1000 - #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) - #define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */ + +#ifdef SPIFLASH +# define CONFIG_SYS_NO_FLASH 1 +# define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR +# define CONFIG_XILINX_SPI 1 +# define CONFIG_SPI 1 +# define CONFIG_SPI_FLASH 1 +# define CONFIG_SPI_FLASH_STMICRO 1 +# define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 +# define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ +# define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS + +# ifdef RAMENV +# define CONFIG_ENV_IS_NOWHERE 1 +# define CONFIG_ENV_SIZE 0x1000 +# define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) + +# else /* SPIFLASH && !RAMENV */ +# define CONFIG_ENV_IS_IN_SPI_FLASH 1 +# define CONFIG_ENV_SPI_MODE SPI_MODE_3 +# define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +# define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +/* 128K(two sectors) for env */ +# define CONFIG_ENV_SECT_SIZE 0x10000 +# define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE) +/* Warning: adjust the offset in respect of other flash content and size */ +# define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */ +# endif /* SPIFLASH && !RAMBOOT */ +#else /* !SPIFLASH */ + +/* ENV in RAM */ +# define CONFIG_SYS_NO_FLASH 1 +# define CONFIG_ENV_IS_NOWHERE 1 +# define CONFIG_ENV_SIZE 0x1000 +# define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) +#endif /* !SPIFLASH */ #endif /* !FLASH */ /* system ace */ #ifdef XILINX_SYSACE_BASEADDR - #define CONFIG_SYSTEMACE - /* #define DEBUG_SYSTEMACE */ - #define SYSTEMACE_CONFIG_FPGA - #define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR - #define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH - #define CONFIG_DOS_PARTITION +# define CONFIG_SYSTEMACE +/* #define DEBUG_SYSTEMACE */ +# define SYSTEMACE_CONFIG_FPGA +# define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR +# define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH +# define CONFIG_DOS_PARTITION #endif #if defined(XILINX_USE_ICACHE) - #define CONFIG_ICACHE +# define CONFIG_ICACHE #else - #undef CONFIG_ICACHE +# undef CONFIG_ICACHE #endif #if defined(XILINX_USE_DCACHE) - #define CONFIG_DCACHE +# define CONFIG_DCACHE #else - #undef CONFIG_DCACHE +# undef CONFIG_DCACHE #endif /* @@ -225,56 +314,94 @@ #define CONFIG_CMD_ECHO #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE) - #define CONFIG_CMD_CACHE +# define CONFIG_CMD_CACHE #else - #undef CONFIG_CMD_CACHE +# undef CONFIG_CMD_CACHE #endif #ifndef CONFIG_SYS_ENET - #undef CONFIG_CMD_NET +# undef CONFIG_CMD_NET +# undef CONFIG_CMD_NFS #else - #define CONFIG_CMD_PING +# define CONFIG_CMD_PING +# define CONFIG_CMD_DHCP +# define CONFIG_CMD_TFTPPUT #endif #if defined(CONFIG_SYSTEMACE) - #define CONFIG_CMD_EXT2 - #define CONFIG_CMD_FAT +# define CONFIG_CMD_EXT2 +# define CONFIG_CMD_FAT #endif #if defined(FLASH) - #define CONFIG_CMD_ECHO - #define CONFIG_CMD_FLASH - #define CONFIG_CMD_IMLS - #define CONFIG_CMD_JFFS2 - - #if !defined(RAMENV) - #define CONFIG_CMD_ENV - #define CONFIG_CMD_SAVES - #endif +# define CONFIG_CMD_ECHO +# define CONFIG_CMD_FLASH +# define CONFIG_CMD_IMLS +# define CONFIG_CMD_JFFS2 +# define CONFIG_CMD_UBI +# undef CONFIG_CMD_UBIFS + +# if !defined(RAMENV) +# define CONFIG_CMD_SAVEENV +# define CONFIG_CMD_SAVES +# endif + +#else +#if defined(SPIFLASH) +# define CONFIG_CMD_SF + +# if !defined(RAMENV) +# define CONFIG_CMD_SAVEENV +# define CONFIG_CMD_SAVES +# endif #else - #undef CONFIG_CMD_IMLS - #undef CONFIG_CMD_FLASH - #undef CONFIG_CMD_JFFS2 +# undef CONFIG_CMD_IMLS +# undef CONFIG_CMD_FLASH +# undef CONFIG_CMD_JFFS2 +# undef CONFIG_CMD_UBI +# undef CONFIG_CMD_UBIFS +#endif #endif #if defined(CONFIG_CMD_JFFS2) -/* JFFS2 partitions */ -#define CONFIG_JFFS2_CMDLINE /* mtdparts command line support */ -#define MTDIDS_DEFAULT "nor0=ml401-0" +# define CONFIG_MTD_PARTITIONS +#endif + +#if defined(CONFIG_CMD_UBIFS) +# define CONFIG_CMD_UBI +# define CONFIG_LZO +#endif + +#if defined(CONFIG_CMD_UBI) +# define CONFIG_MTD_PARTITIONS +# define CONFIG_RBTREE +#endif + +#if defined(CONFIG_MTD_PARTITIONS) +/* MTD partitions */ +#define CONFIG_CMD_MTDPARTS /* mtdparts command line support */ +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define CONFIG_FLASH_CFI_MTD +#define MTDIDS_DEFAULT "nor0=flash-0" /* default mtd partition table */ -#define MTDPARTS_DEFAULT "mtdparts=ml401-0:256k(u-boot),"\ +#define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\ "256k(env),3m(kernel),1m(romfs),"\ "1m(cramfs),-(jffs2)" #endif /* Miscellaneous configurable options */ #define CONFIG_SYS_PROMPT "U-Boot-mONStR> " -#define CONFIG_SYS_CBSIZE 512 /* size of console buffer */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */ -#define CONFIG_SYS_MAXARGS 15 /* max number of command args */ +/* size of console buffer */ +#define CONFIG_SYS_CBSIZE 512 + /* print buffer size */ +#define CONFIG_SYS_PBSIZE \ + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +/* max number of command args */ +#define CONFIG_SYS_MAXARGS 15 #define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START /* default load address */ +/* default load address */ +#define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START #define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */ #define CONFIG_BOOTARGS "root=romfs" @@ -289,14 +416,43 @@ #define CONFIG_SYS_USR_EXCEP /* user exception */ #define CONFIG_SYS_HZ 1000 -#define CONFIG_PREBOOT "echo U-BOOT for $(hostname);setenv preboot;echo" +#define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo" -#define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\ - "nor0=ml401-0\0"\ - "mtdparts=mtdparts=ml401-0:"\ +#define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \ + "nor0=flash-0\0"\ + "mtdparts=mtdparts=flash-0:"\ "256k(u-boot),256k(env),3m(kernel),"\ "1m(romfs),1m(cramfs),-(jffs2)\0" #define CONFIG_CMDLINE_EDITING +/* Use the HUSH parser */ +#define CONFIG_SYS_HUSH_PARSER + +/* Enable flat device tree support */ +#define CONFIG_LMB 1 +#define CONFIG_FIT 1 +#define CONFIG_OF_LIBFDT 1 + +#if defined(CONFIG_XILINX_LL_TEMAC) || defined(CONFIG_XILINX_AXIEMAC) +# define CONFIG_MII 1 +# define CONFIG_CMD_MII 1 +# define CONFIG_PHY_GIGE 1 +# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1 +# define CONFIG_PHYLIB 1 +# define CONFIG_PHY_ATHEROS 1 +# define CONFIG_PHY_BROADCOM 1 +# define CONFIG_PHY_DAVICOM 1 +# define CONFIG_PHY_LXT 1 +# define CONFIG_PHY_MARVELL 1 +# define CONFIG_PHY_MICREL 1 +# define CONFIG_PHY_NATSEMI 1 +# define CONFIG_PHY_REALTEK 1 +# define CONFIG_PHY_VITESSE 1 +#else +# undef CONFIG_MII +# undef CONFIG_CMD_MII +# undef CONFIG_PHYLIB +#endif + #endif /* __CONFIG_H */