X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fmeesc.h;h=955d0e278ac6af19b86a72847a87358478ccee39;hb=9597494ebfb60418e8a0e7565cca2b7d25512bf5;hp=31f2a8cf130b8a6efc3ac35a47dde35fa1cdee4d;hpb=6e2fbdea1b26d75314d87c380a36b0015bf824cf;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/meesc.h b/include/configs/meesc.h
index 31f2a8c..955d0e2 100644
--- a/include/configs/meesc.h
+++ b/include/configs/meesc.h
@@ -9,23 +9,7 @@
  *
  * Configuation settings for the esd MEESC board.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -56,7 +40,6 @@
 /* ARM asynchronous clock */
 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768	/* 32.768 kHz crystal */
 #define CONFIG_SYS_AT91_MAIN_CLOCK	16000000/* 16.0 MHz crystal */
-#define CONFIG_SYS_HZ			1000	/* decrementer freq */
 
 /* Misc CPU related */
 #define CONFIG_SKIP_LOWLEVEL_INIT
@@ -141,7 +124,6 @@
 #ifdef CONFIG_SYS_USE_DATAFLASH
 # define CONFIG_ATMEL_DATAFLASH_SPI
 # define CONFIG_HAS_DATAFLASH
-# define CONFIG_SYS_SPI_WRITE_TOUT		(5 * CONFIG_SYS_HZ)
 # define CONFIG_SYS_MAX_DATAFLASH_BANKS		1
 # define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000	/* CS0 */
 # define AT91_SPI_CLK				15000000
@@ -160,8 +142,8 @@
 # define CONFIG_SYS_NAND_DBW_8
 # define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
 # define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
-# define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIO_PORTD, 15
-# define CONFIG_SYS_NAND_READY_PIN		AT91_PIO_PORTA, 22
+# define CONFIG_SYS_NAND_ENABLE_PIN		GPIO_PIN_PD(15)
+# define CONFIG_SYS_NAND_READY_PIN		GPIO_PIN_PA(22)
 #endif
 
 /* Ethernet */
@@ -173,6 +155,7 @@
 
 /* USB */
 #define CONFIG_USB_ATMEL
+#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
 #define CONFIG_USB_OHCI_NEW
 #define CONFIG_DOS_PARTITION
 #define CONFIG_SYS_USB_OHCI_CPU_INIT
@@ -206,7 +189,6 @@
 
 #endif
 
-#define CONFIG_SYS_PROMPT		"=> "
 #define CONFIG_SYS_CBSIZE		512
 #define CONFIG_SYS_MAXARGS		16
 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \