X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fls2080aqds.h;h=f6efda258c0e1b52dd17e44a7d088b10412ef7f3;hb=13e28f4987dd514ddbda36915bd9b8996a2d328d;hp=8b4ea499e867e7dd8d6c22bf946905a71a60504b;hpb=ce30e3ff1e4b5abff5a9936776fe99190d705236;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 8b4ea49..f6efda2 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -10,7 +10,6 @@ #include "ls2080a_common.h" #ifdef CONFIG_FSL_QSPI -#define CONFIG_QIXIS_I2C_ACCESS #define CONFIG_SYS_I2C_IFDR_DIV 0x7e #endif @@ -25,21 +24,6 @@ #define SPD_EEPROM_ADDRESS5 0x55 #define SPD_EEPROM_ADDRESS6 0x56 /* dummy address */ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 -#define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ -#define CONFIG_DIMM_SLOTS_PER_CTLR 2 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 -#ifdef CONFIG_SYS_FSL_HAS_DP_DDR -#define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1 -#endif - -/* SATA */ -#define CONFIG_SCSI_AHCI_PLAT - -#define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1 -#define CONFIG_SYS_SATA2 AHCI_BASE_ADDR2 - -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 -#define CONFIG_SYS_SCSI_MAX_LUN 1 #define CONFIG_SYS_NOR0_CSPR_EXT (0x0) #define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) @@ -80,14 +64,8 @@ #define CONFIG_SYS_IFC_CCR 0x01000000 #ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ -#define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ -#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ - -#define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE,\ CONFIG_SYS_FLASH_BASE + 0x40000000} #endif @@ -128,7 +106,6 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_MTD_NAND_VERIFY_WRITE -#define CONFIG_FSL_QIXIS /* use common QIXIS code */ #define QIXIS_LBMAP_SWITCH 0x06 #define QIXIS_LBMAP_MASK 0x0f #define QIXIS_LBMAP_SHIFT 0 @@ -199,7 +176,6 @@ #define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NAND_FTIM2 #define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3 -#define CONFIG_SPL_PAD_TO 0x20000 #define CONFIG_SYS_NAND_U_BOOT_SIZE (640 * 1024) #endif #else @@ -232,10 +208,6 @@ #define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3 #endif -/* Debug Server firmware */ -#define CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR -#define CONFIG_SYS_DEBUG_SERVER_FW_ADDR 0x580D00000ULL - #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 /* @@ -257,14 +229,6 @@ #define FSL_QIXIS_BRDCFG9_QSPI 0x1 /* - * MMC - */ -#ifdef CONFIG_MMC -#define CONFIG_ESDHC_DETECT_QUIRK ((readb(QIXIS_BASE + QIXIS_STAT_PRES1) & \ - QIXIS_SDID_MASK) != QIXIS_ESDHC_NO_ADAPTER) -#endif - -/* * RTC configuration */ #define RTC @@ -277,10 +241,6 @@ #define CONFIG_FSL_MEMAC -#ifdef CONFIG_PCI -#define CONFIG_PCI_SCAN_SHOW -#endif - /* Initial environment variables */ #undef CONFIG_EXTRA_ENV_SETTINGS #ifdef CONFIG_NXP_ESBC @@ -424,7 +384,7 @@ "env exists secureboot && esbc_halt;" #endif -#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_FSL_MC_ENET) #define CONFIG_FSL_MEMAC #define SGMII_CARD_PORT1_PHY_ADDR 0x1C #define SGMII_CARD_PORT2_PHY_ADDR 0x1d @@ -448,8 +408,6 @@ #define XQSGMII_CARD_PHY4_PORT2_ADDR 0xe #define XQSGMII_CARD_PHY4_PORT3_ADDR 0xf -#define CONFIG_ETHPRIME "DPMAC1@xgmii" - #endif #include