X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fls2080a_simu.h;h=ab46df76007fa68fb41896c457eb8b9df5738052;hb=a09fea1d28fe3c69a64bee092f5a764274d26ca2;hp=876ee30517fddb92dbe95a1cf1e870e316c75b64;hpb=1670c8c219f6e47de624b4ed557b5a995265cd40;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/ls2080a_simu.h b/include/configs/ls2080a_simu.h index 876ee30..ab46df7 100644 --- a/include/configs/ls2080a_simu.h +++ b/include/configs/ls2080a_simu.h @@ -1,7 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (C) 2014 Freescale Semiconductor - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __LS2_SIMU_H @@ -9,22 +8,9 @@ #include "ls2080a_common.h" -#ifdef CONFIG_LS2080A -#define CONFIG_IDENT_STRING " LS2080A-SIMU" -#define CONFIG_BOOTP_VCI_STRING "U-boot.LS2080A-SIMU" -#endif - -#ifdef CONFIG_LS2085A -#define CONFIG_IDENT_STRING " LS2085A-SIMU" -#define CONFIG_BOOTP_VCI_STRING "U-boot.LS2085A-SIMU" -#endif - #define CONFIG_SYS_CLK_FREQ 100000000 #define CONFIG_DDR_CLK_FREQ 133333333 -#define CONFIG_SYS_MXC_I2C1_SPEED 40000000 -#define CONFIG_SYS_MXC_I2C2_SPEED 40000000 - #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL 4 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR @@ -38,6 +24,10 @@ #define CONFIG_SYS_NOR0_CSPR_EXT (0x0) #define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) +#ifdef CONFIG_MTD_NOR_FLASH +#define CONFIG_SYS_FLASH_QUIET_TEST +#endif + /* * NOR Flash Timing Params */ @@ -63,7 +53,7 @@ #define CONFIG_SYS_NOR_FTIM3 0x04000000 #define CONFIG_SYS_IFC_CCR 0x01000000 -#ifndef CONFIG_SYS_NO_FLASH +#ifdef CONFIG_MTD_NOR_FLASH #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ @@ -79,7 +69,6 @@ #define CONFIG_SYS_NAND_MAX_ECCPOS 256 #define CONFIG_SYS_NAND_MAX_OOBFREE 2 - #define CONFIG_SYS_NAND_CSPR_EXT (0x0) #define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ | CSPR_PORT_SIZE_8 /* Port Size = 8 bit */ \ @@ -114,7 +103,6 @@ #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_MTD_NAND_VERIFY_WRITE -#define CONFIG_CMD_NAND #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) @@ -137,14 +125,8 @@ #define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3 /* MMC */ -#define CONFIG_MMC #ifdef CONFIG_MMC -#define CONFIG_CMD_MMC -#define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 -#define CONFIG_GENERIC_MMC -#define CONFIG_CMD_FAT -#define CONFIG_DOS_PARTITION #endif /* Debug Server firmware */ @@ -152,9 +134,6 @@ #define CONFIG_SYS_DEBUG_SERVER_FW_ADDR 0x580C00000ULL /* MC firmware */ -#define CONFIG_SYS_LS_MC_FW_IN_NOR -#define CONFIG_SYS_LS_MC_FW_ADDR 0x580200000ULL - #define CONFIG_SYS_LS_MC_DPL_IN_NOR #define CONFIG_SYS_LS_MC_DPL_ADDR 0x5806C0000ULL @@ -164,7 +143,5 @@ #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 200000 /* Store environment at top of flash */ -#define CONFIG_ENV_IS_NOWHERE 1 -#define CONFIG_ENV_SIZE 0x1000 #endif /* __LS2_SIMU_H */