X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fls1088a_common.h;h=ab5b396e1a5991933ee5c96b650cfc883ab174c1;hb=a09fea1d28fe3c69a64bee092f5a764274d26ca2;hp=6b71d47c5acc8030c5ad4ca5fb6e73b3c26ca5cc;hpb=72061f78462dbe09b37ec4575874a046bb9c0b03;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 6b71d47..ab5b396 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -1,44 +1,50 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2017 NXP - * - * SPDX-License-Identifier: GPL-2.0+ + * Copyright 2017-2018 NXP */ #ifndef __LS1088_COMMON_H #define __LS1088_COMMON_H +/* SPL build */ +#ifdef CONFIG_SPL_BUILD +#define SPL_NO_BOARDINFO +#define SPL_NO_QIXIS +#define SPL_NO_PCI +#define SPL_NO_ENV +#define SPL_NO_RTC +#define SPL_NO_USB +#define SPL_NO_SATA +#define SPL_NO_QSPI +#define SPL_NO_IFC +#undef CONFIG_DISPLAY_CPUINFO +#endif #define CONFIG_REMAKE_ELF -#define CONFIG_FSL_LAYERSCAPE -#define CONFIG_MP #include #include #include +#define LS1088ARDB_PB_BOARD 0x4A /* Link Definitions */ +#ifdef CONFIG_TFABOOT +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE +#else #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0) +#endif /* Link Definitions */ -#ifdef CONFIG_SPL -#define CONFIG_SYS_TEXT_BASE 0x80400000 +#ifdef CONFIG_TFABOOT +#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000 #else #ifdef CONFIG_QSPI_BOOT -#define CONFIG_SYS_TEXT_BASE 0x20100000 -#else -#define CONFIG_SYS_TEXT_BASE 0x30100000 +#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000 #endif #endif -#define CONFIG_SUPPORT_RAW_INITRD - - #define CONFIG_SKIP_LOWLEVEL_INIT -#if !defined(CONFIG_SD_BOOT) -#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ -#endif - #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 @@ -58,15 +64,12 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2048 * 1024) /* I2C */ +#ifndef CONFIG_DM_I2C #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ -#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ -#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ -#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */ +#endif + /* Serial Port */ -#define CONFIG_CONS_INDEX 1 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2) @@ -74,8 +77,10 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#if !defined(SPL_NO_IFC) || defined(CONFIG_TARGET_LS1088AQDS) /* IFC */ #define CONFIG_FSL_IFC +#endif /* * During booting, IFC is mapped at the region of 0x30000000. @@ -142,13 +147,9 @@ unsigned long long get_qixis_addr(void); */ #if defined(CONFIG_FSL_MC_ENET) -#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024) +#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (128UL * 1024 * 1024) #endif - -#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ - /* Command line configuration */ -#define CONFIG_CMD_GREPENV #define CONFIG_CMD_CACHE /* Miscellaneous configurable options */ @@ -156,8 +157,6 @@ unsigned long long get_qixis_addr(void); /* SATA */ #ifdef CONFIG_SCSI -#define CONFIG_LIBATA -#define CONFIG_SCSI_AHCI #define CONFIG_SCSI_AHCI_PLAT #define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1 @@ -170,13 +169,12 @@ unsigned long long get_qixis_addr(void); /* Physical Memory Map */ #define CONFIG_CHIP_SELECTS_PER_CTRL 4 -#define CONFIG_NR_DRAM_BANKS 2 - #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 /* #define CONFIG_DISPLAY_CPUINFO */ +#ifndef SPL_NO_ENV /* Allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -196,53 +194,57 @@ unsigned long long get_qixis_addr(void); "mcinitcmd=fsl_mc start mc 0x580a00000" \ " 0x580e00000 \0" -#define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \ - "earlycon=uart8250,mmio,0x21c0500 " \ - "ramdisk_size=0x3000000 default_hugepagesz=2m" \ - " hugepagesz=2m hugepages=256" +#ifndef CONFIG_TFABOOT #if defined(CONFIG_QSPI_BOOT) #define CONFIG_BOOTCOMMAND "sf probe 0:0;" \ - "sf read 0x80200000 0xd00000 0x100000;"\ - " fsl_mc apply dpl 0x80200000 &&" \ + "sf read 0x80001000 0xd00000 0x100000;"\ + " fsl_mc lazyapply dpl 0x80001000 &&" \ " sf read $kernel_load $kernel_start" \ " $kernel_size && bootm $kernel_load" #elif defined(CONFIG_SD_BOOT) -#define CONFIG_BOOTCOMMAND "mmcinfo;mmc read 0x80200000 0x6800 0x800;"\ - " fsl_mc apply dpl 0x80200000 &&" \ +#define CONFIG_BOOTCOMMAND "mmcinfo;mmc read 0x80001000 0x6800 0x800;"\ + " fsl_mc lazyapply dpl 0x80001000 &&" \ " mmc read $kernel_load $kernel_start" \ " $kernel_size && bootm $kernel_load" #else /* NOR BOOT*/ -#define CONFIG_BOOTCOMMAND "fsl_mc apply dpl 0x580d00000 &&" \ +#define CONFIG_BOOTCOMMAND "fsl_mc lazyapply dpl 0x580d00000 &&" \ " cp.b $kernel_start $kernel_load" \ " $kernel_size && bootm $kernel_load" #endif +#endif /* CONFIG_TFABOOT */ +#endif /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING 1 -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MAXARGS 64 /* max command args */ -#define CONFIG_PANIC_HANG /* do not reset board on panic */ - #ifdef CONFIG_SPL #define CONFIG_SPL_BSS_START_ADDR 0x80100000 #define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 -#define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" #define CONFIG_SPL_MAX_SIZE 0x16000 #define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0) #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_TEXT_BASE 0x1800a000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 #define CONFIG_SYS_SPL_MALLOC_START 0x80200000 -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) + +#ifdef CONFIG_NXP_ESBC +#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) +/* + * HDR would be appended at end of image and copied to DDR along + * with U-Boot image. Here u-boot max. size is 512K. So if binary + * size increases then increase this size in case of secure boot as + * it uses raw u-boot image instead of fit image. + */ +#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE) +#else +#define CONFIG_SYS_MONITOR_LEN 0x100000 +#endif /* ifdef CONFIG_NXP_ESBC */ + #endif #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */