X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fls1046ardb.h;h=ffca410b1a9fd2d545ca7a576713f2707a028a9e;hb=0223462b373b975d970fa86e5e1a7eadd1d41820;hp=40ce8ff4623b3df3da83ae2d75e40eff47318ab3;hpb=420b0eba3c957d82c598fbb3dff8187ce5cf7313;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h
index 40ce8ff..ffca410 100644
--- a/include/configs/ls1046ardb.h
+++ b/include/configs/ls1046ardb.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2016 Freescale Semiconductor
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __LS1046ARDB_H__
@@ -9,22 +8,14 @@
 
 #include "ls1046a_common.h"
 
-#ifdef CONFIG_SD_BOOT
-#define CONFIG_SYS_TEXT_BASE		0x82000000
-#else
-#define CONFIG_SYS_TEXT_BASE		0x40100000
-#endif
-
 #define CONFIG_SYS_CLK_FREQ		100000000
 #define CONFIG_DDR_CLK_FREQ		100000000
 
 #define CONFIG_LAYERSCAPE_NS_ACCESS
-#define CONFIG_MISC_INIT_R
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
 /* Physical Memory Map */
 #define CONFIG_CHIP_SELECTS_PER_CTRL	4
-#define CONFIG_NR_DRAM_BANKS		2
 
 #define CONFIG_DDR_SPD
 #define SPD_EEPROM_ADDRESS		0x51
@@ -38,17 +29,21 @@
 #define CONFIG_FSL_DDR_INTERACTIVE	/* Interactive debugging */
 #endif
 
-#ifdef CONFIG_RAMBOOT_PBL
-#define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1046ardb/ls1046ardb_pbi.cfg
-#endif
-
 #ifdef CONFIG_SD_BOOT
+#define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1046ardb/ls1046ardb_pbi.cfg
 #ifdef CONFIG_EMMC_BOOT
 #define CONFIG_SYS_FSL_PBL_RCW \
 	board/freescale/ls1046ardb/ls1046ardb_rcw_emmc.cfg
 #else
 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1046ardb/ls1046ardb_rcw_sd.cfg
 #endif
+#elif defined(CONFIG_QSPI_BOOT)
+#define CONFIG_SYS_FSL_PBL_RCW \
+	board/freescale/ls1046ardb/ls1046ardb_rcw_qspi.cfg
+#define CONFIG_SYS_FSL_PBL_PBI \
+	board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg
+#define CONFIG_SYS_UBOOT_BASE		0x40100000
+#define CONFIG_SYS_SPL_ARGS_ADDR	0x90000000
 #endif
 
 #ifndef SPL_NO_IFC
@@ -195,6 +190,8 @@
 
 #define FM1_10GEC1_PHY_ADDR		0x0
 
+#define FDT_SEQ_MACADDR_FROM_ENV
+
 #define CONFIG_ETHPRIME			"FM1@DTSEC3"
 #endif
 
@@ -209,33 +206,15 @@
 #endif
 #endif
 
-/* USB */
-#ifndef SPL_NO_USB
-#define CONFIG_USB_MAX_CONTROLLER_COUNT         3
-#endif
-
-/* SATA */
-#ifndef SPL_NO_SATA
-#define CONFIG_LIBATA
-#define CONFIG_SCSI_AHCI
-#define CONFIG_SCSI_AHCI_PLAT
-
-#define CONFIG_SYS_SATA				AHCI_BASE_ADDR
-
-#define CONFIG_SYS_SCSI_MAX_SCSI_ID		1
-#define CONFIG_SYS_SCSI_MAX_LUN			1
-#define CONFIG_SYS_SCSI_MAX_DEVICE		(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
-						CONFIG_SYS_SCSI_MAX_LUN)
-#endif
-
 #ifndef SPL_NO_MISC
 #undef CONFIG_BOOTCOMMAND
-#define CONFIG_BOOTCOMMAND "run distro_bootcmd; env exists secureboot"	\
-			   "&& esbc_halt; run qspi_bootcmd;"
-#define MTDPARTS_DEFAULT "mtdparts=1550000.quadspi:1m(rcw)," \
-			"15m(u-boot),48m(kernel.itb);" \
-			"7e800000.flash:16m(nand_uboot)," \
-			"48m(nand_kernel),448m(nand_free)"
+#if defined(CONFIG_QSPI_BOOT)
+#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "	\
+			   "env exists secureboot && esbc_halt;;"
+#elif defined(CONFIG_SD_BOOT)
+#define CONFIG_BOOTCOMMAND "run distro_bootcmd;run sd_bootcmd; "	\
+			   "env exists secureboot && esbc_halt;"
+#endif
 #endif
 
 #include <asm/fsl_secure_boot.h>