X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fls1046aqds.h;h=36c64db8f5d17a2e061001a97c411109a7399378;hb=a552ffc9d270769286d7a0697913689c31537bfa;hp=f3e4f6a4c56198085da9f7d35c62cd943faadd12;hpb=efb5dab7ba8a9a6f89e44c4e60b0adb768c77e84;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index f3e4f6a..36c64db 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -8,37 +8,14 @@ #include "ls1046a_common.h" -#ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(void); -#endif - -#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() - -#define CONFIG_SKIP_LOWLEVEL_INIT - -#define CONFIG_LAYERSCAPE_NS_ACCESS - -#define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Physical Memory Map */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 -#define CONFIG_DDR_SPD #define SPD_EEPROM_ADDRESS 0x51 -#define CONFIG_SYS_SPD_BUS_NUM 0 -#define CONFIG_DDR_ECC #ifdef CONFIG_DDR_ECC -#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif -/* DSPI */ -#ifdef CONFIG_FSL_DSPI -#define CONFIG_SPI_FLASH_STMICRO /* cs0 */ -#define CONFIG_SPI_FLASH_SST /* cs1 */ -#define CONFIG_SPI_FLASH_EON /* cs2 */ -#endif - #ifdef CONFIG_SYS_DPAA_FMAN #define RGMII_PHY1_ADDR 0x1 #define RGMII_PHY2_ADDR 0x2 @@ -53,29 +30,8 @@ unsigned long get_board_sys_clk(void); #define QSGMII_CARD_PORT4_PHY_ADDR_S2 0xB #endif -#ifdef CONFIG_RAMBOOT_PBL -#define CONFIG_SYS_FSL_PBL_PBI \ - board/freescale/ls1046aqds/ls1046aqds_pbi.cfg -#endif - -#ifdef CONFIG_NAND_BOOT -#define CONFIG_SYS_FSL_PBL_RCW \ - board/freescale/ls1046aqds/ls1046aqds_rcw_nand.cfg -#endif - -#ifdef CONFIG_SD_BOOT -#ifdef CONFIG_SD_BOOT_QSPI -#define CONFIG_SYS_FSL_PBL_RCW \ - board/freescale/ls1046aqds/ls1046aqds_rcw_sd_qspi.cfg -#else -#define CONFIG_SYS_FSL_PBL_RCW \ - board/freescale/ls1046aqds/ls1046aqds_rcw_sd_ifc.cfg -#endif -#endif - /* IFC */ #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_FSL_IFC /* * CONFIG_SYS_FLASH_BASE has the final address (core view) * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view) @@ -94,7 +50,6 @@ unsigned long get_board_sys_clk(void); /* LPUART */ #ifdef CONFIG_LPUART -#define CONFIG_LPUART_32B_REG #define CFG_UART_MUX_MASK 0x6 #define CFG_UART_MUX_SHIFT 1 #define CFG_LPUART_EN 0x2 @@ -136,7 +91,6 @@ unsigned long get_board_sys_clk(void); FTIM2_NOR_TWP(0x1c)) #define CONFIG_SYS_NOR_FTIM3 0 -#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ @@ -145,13 +99,11 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS, \ CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000} -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_SYS_WRITE_SWAPPED_DATA /* * NAND Flash Definitions */ -#define CONFIG_NAND_FSL_IFC #define CONFIG_SYS_NAND_BASE 0x7e800000 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE @@ -171,8 +123,6 @@ unsigned long get_board_sys_clk(void); | CSOR_NAND_SPRZ_224 /* Spare size = 224 */ \ | CSOR_NAND_PB(64)) /* 64 Pages Per Block */ -#define CONFIG_SYS_NAND_ONFI_DETECTION - #define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x7) | \ FTIM0_NAND_TWP(0x18) | \ FTIM0_NAND_TWCHT(0x7) | \ @@ -189,25 +139,19 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_MTD_NAND_VERIFY_WRITE - -#define CONFIG_SYS_NAND_BLOCK_SIZE (256 * 1024) #endif #ifdef CONFIG_NAND_BOOT -#define CONFIG_SPL_PAD_TO 0x40000 /* block aligned */ -#define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) #endif #if defined(CONFIG_TFABOOT) || \ defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_QIXIS_I2C_ACCESS #endif /* * QIXIS Definitions */ -#define CONFIG_FSL_QIXIS #ifdef CONFIG_FSL_QIXIS #define QIXIS_BASE 0x7fb00000 @@ -377,12 +321,6 @@ unsigned long get_board_sys_clk(void); #define I2C_VOL_MONITOR_BUS_V_OVF 0x1 #define I2C_VOL_MONITOR_BUS_V_SHIFT 3 -#define CONFIG_VID_FLS_ENV "ls1046aqds_vdd_mv" -#ifndef CONFIG_SPL_BUILD -#define CONFIG_VID -#endif -#define CONFIG_VOL_MONITOR_IR36021_SET -#define CONFIG_VOL_MONITOR_INA220 /* The lowest and highest voltage allowed for LS1046AQDS */ #define VDD_MV_MIN 819 #define VDD_MV_MAX 1212 @@ -391,20 +329,10 @@ unsigned long get_board_sys_clk(void); * Miscellaneous configurable options */ -#define CONFIG_SYS_HZ 1000 - -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ - /* * Environment */ -#define CONFIG_CMDLINE_TAG - -#undef CONFIG_BOOTCOMMAND #ifdef CONFIG_TFABOOT #define IFC_NAND_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; " \ "env exists secureboot && esbc_halt;;" @@ -414,20 +342,6 @@ unsigned long get_board_sys_clk(void); "env exists secureboot && esbc_halt;;" #define SD_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; " \ "env exists secureboot && esbc_halt;;" -#else -#if defined(CONFIG_QSPI_BOOT) -#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; " \ - "env exists secureboot && esbc_halt;;" -#elif defined(CONFIG_NAND_BOOT) -#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; " \ - "env exists secureboot && esbc_halt;;" -#elif defined(CONFIG_SD_BOOT) -#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; " \ - "env exists secureboot && esbc_halt;;" -#else -#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; " \ - "env exists secureboot && esbc_halt;;" -#endif #endif #include