X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fls1043a_common.h;h=47367845a07fda95fe0b9c4375763c55d2ef8ac4;hb=4e5909450ec2acafb3d2e5b9714251ae67e0f0e0;hp=b3f91176d65ea4c3260634a02483e007f8cc8a97;hpb=b9c9ce8a4064c8d88f714604db856cf1cd2b40b5;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index b3f9117..4736784 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -26,29 +26,19 @@ #define SPL_NO_IFC #endif -#define CONFIG_REMAKE_ELF - #include #include /* Link Definitions */ -#ifdef CONFIG_TFABOOT -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE -#else -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0) -#endif #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 +#define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL #define CPU_RELEASE_ADDR secondary_boot_addr -/* Generic Timer Definitions */ -#define COUNTER_FREQUENCY 25000000 /* 25MHz */ - /* Serial Port */ #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 @@ -56,17 +46,6 @@ /* SD boot SPL */ #ifdef CONFIG_SD_BOOT - -#define CONFIG_SPL_MAX_SIZE 0x17000 -#define CONFIG_SPL_STACK 0x1001e000 -#define CONFIG_SPL_PAD_TO 0x1d000 - -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ - CONFIG_SPL_BSS_MAX_SIZE) -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 -#define CONFIG_SPL_BSS_START_ADDR 0x8f000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 - #ifdef CONFIG_NXP_ESBC #define CONFIG_U_BOOT_HDR_SIZE (16 << 10) /* @@ -75,23 +54,13 @@ * size increases then increase this size in case of secure boot as * it uses raw u-boot image instead of fit image. */ -#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE) -#else -#define CONFIG_SYS_MONITOR_LEN 0x100000 #endif /* ifdef CONFIG_NXP_ESBC */ #endif /* NAND SPL */ #ifdef CONFIG_NAND_BOOT -#define CONFIG_SPL_PBL_PAD -#define CONFIG_SPL_MAX_SIZE 0x1a000 -#define CONFIG_SPL_STACK 0x1001d000 -#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_SPL_MALLOC_START 0x80200000 -#define CONFIG_SPL_BSS_START_ADDR 0x80100000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 +#define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE +#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE #ifdef CONFIG_NXP_ESBC #define CONFIG_U_BOOT_HDR_SIZE (16 << 10) @@ -104,37 +73,27 @@ * size increases then increase this size in case of secure boot as * it uses raw u-boot image instead of fit image. */ -#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE) -#else -#define CONFIG_SYS_MONITOR_LEN 0x100000 #endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */ #endif /* GPIO */ -#ifdef CONFIG_DM_GPIO -#ifndef CONFIG_MPC8XXX_GPIO -#define CONFIG_MPC8XXX_GPIO -#endif -#endif /* IFC */ #ifndef SPL_NO_IFC #if defined(CONFIG_TFABOOT) || \ (!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)) -#define CONFIG_FSL_IFC /* * CONFIG_SYS_FLASH_BASE has the final address (core view) * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view) * CONFIG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address - * CONFIG_SYS_TEXT_BASE is linked to 0x60000000 for booting + * CONFIG_TEXT_BASE is linked to 0x60000000 for booting */ #define CONFIG_SYS_FLASH_BASE 0x60000000 #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE #define CONFIG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000 #ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ #endif #endif @@ -142,33 +101,13 @@ /* I2C */ -/* PCIe */ -#ifndef SPL_NO_PCIE -#define CONFIG_PCIE1 /* PCIE controller 1 */ -#define CONFIG_PCIE2 /* PCIE controller 2 */ -#define CONFIG_PCIE3 /* PCIE controller 3 */ - -#ifdef CONFIG_PCI -#define CONFIG_PCI_SCAN_SHOW -#endif -#endif - /* DSPI */ -#ifndef SPL_NO_DSPI -#ifdef CONFIG_FSL_DSPI -#define CONFIG_SPI_FLASH_STMICRO /* cs0 */ -#define CONFIG_SPI_FLASH_SST /* cs1 */ -#define CONFIG_SPI_FLASH_EON /* cs2 */ -#endif -#endif /* FMan ucode */ #ifndef SPL_NO_FMAN #define CONFIG_SYS_DPAA_FMAN #ifdef CONFIG_SYS_DPAA_FMAN #define CONFIG_SYS_FM_MURAM_SIZE 0x60000 - -#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) #endif #endif @@ -178,20 +117,17 @@ #define HWCONFIG_BUFFER_SIZE 128 #ifndef SPL_NO_MISC -#ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(USB, usb, 0) \ func(DHCP, dhcp, na) #include -#endif /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "fdt_high=0xffffffffffffffff\0" \ "initrd_high=0xffffffffffffffff\0" \ - "fdt_addr=0x64f00000\0" \ "kernel_addr=0x61000000\0" \ "scriptaddr=0x80000000\0" \ "scripthdraddr=0x80080000\0" \ @@ -211,7 +147,6 @@ "kernelhdr_size_sd=0x10\0" \ "console=ttyS0,115200\0" \ "boot_os=y\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ BOOTENV \ "boot_scripts=ls1043ardb_boot.scr\0" \ "boot_script_hdr=hdr_ls1043ardb_bs.out\0" \ @@ -273,13 +208,6 @@ #endif #endif -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ - -#define CONFIG_SYS_MAXARGS 64 /* max command args */ - -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - #include #endif /* __LS1043A_COMMON_H */