X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fls1021atwr.h;h=1aa29e541ec5bb73a8db02c97ca805e34a23be11;hb=c45568cc4e51b7bbe2f3ce28d8f2566048aeebf3;hp=4470d974ca97b4acb603669185a423d27c97b3a4;hpb=f113d7d3034672de7d074506a05a7055f1f0dcae;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 4470d97..1aa29e5 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -46,11 +46,6 @@
 #define CONFIG_U_BOOT_HDR_SIZE				(16 << 10)
 #endif /* ifdef CONFIG_NXP_ESBC */
 
-#define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SYS_TEXT_BASE + \
-		CONFIG_SYS_MONITOR_LEN)
-#define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000
-#define CONFIG_SPL_BSS_START_ADDR	0x80100000
-
 #ifdef CONFIG_U_BOOT_HDR_SIZE
 /*
  * HDR would be appended at end of image and copied to DDR along
@@ -176,16 +171,7 @@
 #define CONFIG_SYS_I2C_EEPROM_NXID
 #define CONFIG_SYS_EEPROM_BUS_NUM		1
 
-/* PCIe */
-#define CONFIG_PCIE1		/* PCIE controller 1 */
-#define CONFIG_PCIE2		/* PCIE controller 2 */
-
-#ifdef CONFIG_PCI
-#define CONFIG_PCI_SCAN_SHOW
-#endif
-
 #define CONFIG_PEN_ADDR_BIG_ENDIAN
-#define CONFIG_LAYERSCAPE_NS_ACCESS
 #define CONFIG_SMP_PEN_ADDR		0x01ee0200
 
 #define CONFIG_HWCONFIG
@@ -338,6 +324,5 @@
  */
 
 #include <asm/fsl_secure_boot.h>
-#define CONFIG_SYS_BOOTM_LEN	(64 << 20) /* Increase max gunzip size */
 
 #endif