X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fls1021aqds.h;h=105702d22edf2c393a75aa7c05c95cedf3f8eabd;hb=645176d1d5c37c91ddb06c366678fbe302550387;hp=b8477e89d27cc8d2837c38711c6161c3a52e9183;hpb=2431492aef1de33bd222c97ecc131a338d9c454e;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index b8477e8..105702d 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -9,9 +9,11 @@ #define CONFIG_LS102XA -#define CONFIG_ARMV7_PSCI +#define CONFIG_ARMV7_PSCI_1_0 -#define CONFIG_FSL_CLK +#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR + +#define CONFIG_SYS_FSL_CLK #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO @@ -42,7 +44,7 @@ unsigned long get_board_sys_clk(void); unsigned long get_board_ddr_clk(void); #endif -#ifdef CONFIG_QSPI_BOOT +#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_SYS_CLK_FREQ 100000000 #define CONFIG_DDR_CLK_FREQ 100000000 #define CONFIG_QIXIS_I2C_ACCESS @@ -56,7 +58,13 @@ unsigned long get_board_ddr_clk(void); #endif #ifdef CONFIG_SD_BOOT -#define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1021aqds/ls102xa_rcw_sd.cfg +#ifdef CONFIG_SD_BOOT_QSPI +#define CONFIG_SYS_FSL_PBL_RCW \ + board/freescale/ls1021aqds/ls102xa_rcw_sd_qspi.cfg +#else +#define CONFIG_SYS_FSL_PBL_RCW \ + board/freescale/ls1021aqds/ls102xa_rcw_sd_ifc.cfg +#endif #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds" #define CONFIG_SPL_LIBCOMMON_SUPPORT @@ -69,7 +77,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SPL_DRIVERS_MISC_SUPPORT #define CONFIG_SPL_MMC_SUPPORT #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xe8 -#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400 +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x600 #define CONFIG_SPL_TEXT_BASE 0x10000000 #define CONFIG_SPL_MAX_SIZE 0x1a000 @@ -82,11 +90,14 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 #define CONFIG_SPL_BSS_START_ADDR 0x80100000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 -#define CONFIG_SYS_MONITOR_LEN 0x80000 +#define CONFIG_SYS_MONITOR_LEN 0xc0000 #endif #ifdef CONFIG_QSPI_BOOT #define CONFIG_SYS_TEXT_BASE 0x40010000 +#endif + +#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_SYS_NO_FLASH #endif @@ -162,7 +173,7 @@ unsigned long get_board_ddr_clk(void); /* * IFC Definitions */ -#ifndef CONFIG_QSPI_BOOT +#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_FSL_IFC #define CONFIG_SYS_FLASH_BASE 0x60000000 #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE @@ -270,6 +281,8 @@ unsigned long get_board_ddr_clk(void); #define QIXIS_LBMAP_SHIFT 0 #define QIXIS_LBMAP_DFLTBANK 0x00 #define QIXIS_LBMAP_ALTBANK 0x04 +#define QIXIS_PWR_CTL 0x21 +#define QIXIS_PWR_CTL_POWEROFF 0x80 #define QIXIS_RST_CTL_RESET 0x44 #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 #define QIXIS_RCFG_CTL_RECONFIG_START 0x21 @@ -371,13 +384,13 @@ unsigned long get_board_ddr_clk(void); * Serial Port */ #ifdef CONFIG_LPUART -#define CONFIG_FSL_LPUART #define CONFIG_LPUART_32B_REG #else #define CONFIG_CONS_INDEX 1 -#define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL +#ifndef CONFIG_DM_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 +#endif #define CONFIG_SYS_NS16550_CLK get_serial_clock() #endif @@ -386,7 +399,6 @@ unsigned long get_board_ddr_clk(void); /* * I2C */ -#define CONFIG_CMD_I2C #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ @@ -404,28 +416,22 @@ unsigned long get_board_ddr_clk(void); * MMC */ #define CONFIG_MMC -#define CONFIG_CMD_MMC #define CONFIG_FSL_ESDHC #define CONFIG_GENERIC_MMC -#define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION /* SPI */ -#ifdef CONFIG_QSPI_BOOT +#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) /* QSPI */ -#define CONFIG_FSL_QSPI #define QSPI0_AMBA_BASE 0x40000000 #define FSL_QSPI_FLASH_SIZE (1 << 24) #define FSL_QSPI_FLASH_NUM 2 -#define CONFIG_SPI_FLASH_SPANSION /* DSPI */ -#define CONFIG_FSL_DSPI /* DM SPI */ #if defined(CONFIG_FSL_DSPI) || defined(CONFIG_FSL_QSPI) -#define CONFIG_CMD_SF #define CONFIG_DM_SPI_FLASH #define CONFIG_SPI_FLASH_DATAFLASH #endif @@ -448,18 +454,10 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_HAS_FSL_XHCI_USB #define CONFIG_USB_XHCI_FSL -#define CONFIG_USB_XHCI_DWC3 -#define CONFIG_USB_XHCI #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 #endif -#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_XHCI_USB) -#define CONFIG_CMD_USB -#define CONFIG_USB_STORAGE -#define CONFIG_CMD_EXT2 -#endif - /* * Video */ @@ -472,6 +470,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_VGA_AS_SINGLE_DEVICE #define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO +#define CONFIG_SYS_CONSOLE_IS_IN_ENV #define CONFIG_FSL_DIU_CH7301 #define CONFIG_SYS_I2C_DVI_BUS_NUM 0 @@ -527,8 +526,8 @@ unsigned long get_board_ddr_clk(void); /* PCIe */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */ #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie" @@ -553,17 +552,13 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_CMD_PCI #endif -#define CONFIG_CMD_PING -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_MII - #define CONFIG_CMDLINE_TAG #define CONFIG_CMDLINE_EDITING #define CONFIG_ARMV7_NONSEC #define CONFIG_ARMV7_VIRT #define CONFIG_PEN_ADDR_BIG_ENDIAN -#define CONFIG_LS102XA_NS_ACCESS +#define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_SMP_PEN_ADDR 0x01ee0200 #define CONFIG_TIMER_CLK_FREQ 12500000 @@ -572,21 +567,20 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_FSL_DEVICE_DISABLE -#define CONFIG_BOOTDELAY 3 -#define CONFIG_SYS_QE_FW_ADDR 0x67f40000 +#define CONFIG_SYS_QE_FW_ADDR 0x600c0000 #ifdef CONFIG_LPUART #define CONFIG_EXTRA_ENV_SETTINGS \ "bootargs=root=/dev/ram0 rw console=ttyLP0,115200\0" \ - "fdt_high=0xcfffffff\0" \ - "initrd_high=0xcfffffff\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ "hwconfig=fsl_ddr:ctlr_intlv=null,bank_intlv=null\0" #else #define CONFIG_EXTRA_ENV_SETTINGS \ "bootargs=root=/dev/ram0 rw console=ttyS0,115200\0" \ - "fdt_high=0xcfffffff\0" \ - "initrd_high=0xcfffffff\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ "hwconfig=fsl_ddr:ctlr_intlv=null,bank_intlv=null\0" #endif @@ -594,8 +588,6 @@ unsigned long get_board_ddr_clk(void); * Miscellaneous configurable options */ #define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ #define CONFIG_SYS_PBSIZE \ @@ -603,9 +595,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_CMD_GREPENV -#define CONFIG_CMD_MEMINFO -#define CONFIG_CMD_MEMTEST #define CONFIG_SYS_MEMTEST_START 0x80000000 #define CONFIG_SYS_MEMTEST_END 0x9fffffff @@ -656,19 +645,15 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ #endif -#define CONFIG_OF_LIBFDT -#define CONFIG_OF_BOARD_SETUP -#define CONFIG_CMD_BOOTZ - #define CONFIG_MISC_INIT_R /* Hash command with SHA acceleration supported in hardware */ +#ifdef CONFIG_FSL_CAAM #define CONFIG_CMD_HASH #define CONFIG_SHA_HW_ACCEL +#endif -#ifdef CONFIG_SECURE_BOOT -#define CONFIG_CMD_BLOB #include -#endif +#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ #endif