X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fls1021aiot.h;h=d6839c09160a29089a14fa8706500c72ada9dcb9;hb=551c3934466503e6c8702df412e2a9ce574557e9;hp=7af4bc41dcd5dd6a088c9fb383b4d0f6eb94aaa0;hpb=ed77ccd014b4073c4d282028cfb22f8d1742fec1;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index 7af4bc4..d6839c0 100644
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -7,14 +7,10 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_LS102XA
-
 #define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR
 
 #define CONFIG_SYS_FSL_CLK
 
-#define CONFIG_BOARD_EARLY_INIT_F
-
 /*
  * Size of malloc() pool
  */
@@ -38,11 +34,6 @@
 #define CONFIG_CMD_EXT2
 #endif
 
-/*
- * Generic Timer Definitions
- */
-#define GENERIC_TIMER_CLK		12500000
-
 #define CONFIG_SYS_CLK_FREQ		100000000
 #define CONFIG_DDR_CLK_FREQ		100000000
 
@@ -109,24 +100,17 @@
 #define CONFIG_SPL_BSS_START_ADDR	0x80100000
 #define CONFIG_SPL_BSS_MAX_SIZE		0x80000
 #define CONFIG_SYS_MONITOR_LEN		0x80000
-#define CONFIG_SYS_NO_FLASH
 #endif
 
 #ifdef CONFIG_QSPI_BOOT
 #define CONFIG_SYS_TEXT_BASE		0x40010000
 #endif
 
-#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
-#define CONFIG_SYS_NO_FLASH
-#endif
-
 #define CONFIG_NR_DRAM_BANKS		1
 
 #define CONFIG_SYS_DDR_SDRAM_BASE	0x80000000UL
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_FSL_CAAM			/* Enable CAAM */
-
 /*
  * Serial Port
  */
@@ -134,7 +118,6 @@
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE	1
 #define CONFIG_SYS_NS16550_CLK		get_serial_clock()
-#define CONFIG_BAUDRATE			115200
 
 /*
  * I2C
@@ -156,13 +139,10 @@
 /*
  * MMC
  */
-#define CONFIG_MMC
 #define CONFIG_CMD_MMC
 #define CONFIG_FSL_ESDHC
-#define CONFIG_GENERIC_MMC
 
 /* SATA */
-#define CONFIG_BOARD_LATE_INIT
 #define CONFIG_CMD_SCSI
 #define CONFIG_LIBATA
 #define CONFIG_SCSI_AHCI
@@ -179,7 +159,6 @@
 		CONFIG_SYS_SCSI_MAX_LUN)
 
 #define CONFIG_CMD_FAT
-#define CONFIG_DOS_PARTITION
 
 /* SPI */
 #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
@@ -233,31 +212,12 @@
 #endif
 
 /* PCIe */
-#define CONFIG_PCI		/* Enable PCI/PCIE */
 #define CONFIG_PCIE1		/* PCIE controler 1 */
 #define CONFIG_PCIE2		/* PCIE controler 2 */
 
-/* Use common FSL Layerscape PCIe code */
-#define CONFIG_PCIE_LAYERSCAPE
 #define FSL_PCIE_COMPAT		"fsl,ls1021a-pcie"
 
-#define CONFIG_SYS_PCI_64BIT
-
-#define CONFIG_SYS_PCIE_CFG0_PHYS_OFF	0x00000000
-#define CONFIG_SYS_PCIE_CFG0_SIZE	0x00001000	/* 4k */
-#define CONFIG_SYS_PCIE_CFG1_PHYS_OFF	0x00001000
-#define CONFIG_SYS_PCIE_CFG1_SIZE	0x00001000	/* 4k */
-
-#define CONFIG_SYS_PCIE_IO_BUS		0x00000000
-#define CONFIG_SYS_PCIE_IO_PHYS_OFF	0x00010000
-#define CONFIG_SYS_PCIE_IO_SIZE		0x00010000	/* 64k */
-
-#define CONFIG_SYS_PCIE_MEM_BUS		0x08000000
-#define CONFIG_SYS_PCIE_MEM_PHYS_OFF	0x04000000
-#define CONFIG_SYS_PCIE_MEM_SIZE	0x08000000	/* 128M */
-
 #ifdef CONFIG_PCI
-#define CONFIG_PCI_PNP
 #define CONFIG_PCI_SCAN_SHOW
 #define CONFIG_CMD_PCI
 #endif
@@ -276,7 +236,7 @@
 #define CONFIG_PEN_ADDR_BIG_ENDIAN
 #define CONFIG_LAYERSCAPE_NS_ACCESS
 #define CONFIG_SMP_PEN_ADDR		0x01ee0200
-#define CONFIG_TIMER_CLK_FREQ		12500000
+#define COUNTER_FREQUENCY		12500000
 
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE		256
@@ -307,12 +267,6 @@
 
 #define CONFIG_LS102XA_STREAM_ID
 
-/*
- * Stack sizes
- * The stack sizes are set up in start.S using the settings below
- */
-#define CONFIG_STACKSIZE		(30 * 1024)
-
 #define CONFIG_SYS_INIT_SP_OFFSET \
 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_ADDR \
@@ -351,16 +305,6 @@
 
 #define CONFIG_MISC_INIT_R
 
-/* Hash command with SHA acceleration supported in hardware */
-
-#ifdef CONFIG_FSL_CAAM
-
-#define CONFIG_CMD_HASH
-
-#define CONFIG_SHA_HW_ACCEL
-
-#endif
-
 #include <asm/fsl_secure_boot.h>
 
 #endif