X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fls1021aiot.h;h=912345b2ef34f6efcc0bb3d2dd850919b7a09492;hb=b641dd3ec8dc3f6b18d2fa945ac3ab597063d191;hp=58c71dffa56171c2bc7f562b1704216840818fdf;hpb=fa2c14676c7c6f3115dd4d9b2a4cc3b35c3ad2a2;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 58c71df..912345b 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -1,7 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2016 Freescale Semiconductor, Inc. - * - * SPDX-License-Identifier: GPL-2.0+ + * Copyright 2019 NXP */ #ifndef __CONFIG_H @@ -67,11 +67,9 @@ #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_I2C_SUPPORT #define CONFIG_SPL_WATCHDOG_SUPPORT -#define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_MMC_SUPPORT #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xe8 -#define CONFIG_SPL_TEXT_BASE 0x10000000 #define CONFIG_SPL_MAX_SIZE 0x1a000 #define CONFIG_SPL_STACK 0x1001d000 #define CONFIG_SPL_PAD_TO 0x1c000 @@ -84,15 +82,14 @@ #define CONFIG_SYS_MONITOR_LEN 0x80000 #endif -#define CONFIG_NR_DRAM_BANKS 1 - #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CONFIG_CHIP_SELECTS_PER_CTRL 4 + /* * Serial Port */ -#define CONFIG_CONS_INDEX 1 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK get_serial_clock() @@ -101,7 +98,13 @@ * I2C */ #define CONFIG_CMD_I2C + +#ifndef CONFIG_DM_I2C #define CONFIG_SYS_I2C +#else +#define CONFIG_I2C_SET_DEFAULT_BUS_NUM +#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0 +#endif #define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ @@ -118,7 +121,6 @@ * MMC */ #define CONFIG_CMD_MMC -#define CONFIG_FSL_ESDHC /* SATA */ #define CONFIG_SCSI_AHCI_PLAT @@ -141,7 +143,6 @@ #define QSPI0_AMBA_BASE 0x40000000 #define FSL_QSPI_FLASH_SIZE (1 << 24) #define FSL_QSPI_FLASH_NUM 2 -#define CONFIG_SPI_FLASH_BAR #define CONFIG_SPI_FLASH_SPANSION #endif @@ -154,10 +155,8 @@ /* * eTSEC */ -#define CONFIG_TSEC_ENET #ifdef CONFIG_TSEC_ENET -#define CONFIG_MII #define CONFIG_MII_DEFAULT_TSEC 1 #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC1" @@ -175,8 +174,6 @@ #define CONFIG_ETHPRIME "eTSEC2" -#define CONFIG_PHY_ATHEROS - #define CONFIG_HAS_ETH0 #define CONFIG_HAS_ETH1 #define CONFIG_HAS_ETH2 @@ -195,7 +192,6 @@ #define CONFIG_CMD_MII #define CONFIG_CMDLINE_TAG -#define CONFIG_CMDLINE_EDITING #define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_LAYERSCAPE_NS_ACCESS @@ -209,15 +205,12 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "bootargs=root=/dev/ram0 rw console=ttyS0,115200\0" \ -"initrd_high=0xffffffff\0" \ -"fdt_high=0xffffffff\0" +"initrd_high=0xffffffff\0" /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_BOOTMAPSZ (256 << 20) #define CONFIG_CMD_GREPENV #define CONFIG_CMD_MEMINFO @@ -247,20 +240,12 @@ #define CONFIG_ENV_OVERWRITE #if defined(CONFIG_SD_BOOT) -#define CONFIG_ENV_OFFSET 0x100000 #define CONFIG_SYS_MMC_ENV_DEV 0 -#define CONFIG_ENV_SIZE 0x2000 -#elif defined(CONFIG_QSPI_BOOT) -#define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_ENV_OFFSET 0x100000 -#define CONFIG_ENV_SECT_SIZE 0x10000 #endif #define CONFIG_OF_BOARD_SETUP #define CONFIG_OF_STDOUT_VIA_ALIAS -#define CONFIG_MISC_INIT_R - #include #endif