X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fls1012ardb.h;h=f35fd31cae38706a65c394d82bedea1a5e8314f6;hb=c27269953b94d19b3fc7a21a1c3e19985507b94d;hp=6046ab789525d8bb975aa7d7fea45fca9130d0f3;hpb=3fc304b8d77ce6646d38ae506e9fae74b9975631;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h
index 6046ab7..f35fd31 100644
--- a/include/configs/ls1012ardb.h
+++ b/include/configs/ls1012ardb.h
@@ -9,15 +9,11 @@
 
 #include "ls1012a_common.h"
 
-
+/* DDR */
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
 #define CONFIG_CHIP_SELECTS_PER_CTRL	1
 #define CONFIG_NR_DRAM_BANKS		2
 #define CONFIG_SYS_SDRAM_SIZE		0x40000000
-
-#define CONFIG_SYS_MMDC_CORE_CONTROL_1		0x05180000
-#define CONFIG_SYS_MMDC_CORE_CONTROL_2		0x85180000
-
 #define CONFIG_CMD_MEMINFO
 #define CONFIG_CMD_MEMTEST
 #define CONFIG_SYS_MEMTEST_START	0x80000000
@@ -32,7 +28,6 @@
 #define CONFIG_USB_XHCI_FSL
 #define CONFIG_USB_MAX_CONTROLLER_COUNT         1
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      2
-#define CONFIG_USB_STORAGE
 #endif
 
 /*
@@ -49,7 +44,6 @@
 #define __SW_REV_B		0xF0
 
 /*  MMC  */
-#define CONFIG_MMC
 #ifdef CONFIG_MMC
 #define CONFIG_FSL_ESDHC
 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
@@ -72,7 +66,6 @@
 #define CONFIG_SYS_SCSI_MAX_LUN			1
 #define CONFIG_SYS_SCSI_MAX_DEVICE		(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
 						CONFIG_SYS_SCSI_MAX_LUN)
-#define CONFIG_PCI		/* Enable PCI/PCIE */
 #define CONFIG_PCIE1		/* PCIE controller 1 */
 #define CONFIG_PCIE_LAYERSCAPE	/* Use common FSL Layerscape PCIe code */
 #define FSL_PCIE_COMPAT "fsl,ls1043a-pcie"
@@ -93,7 +86,6 @@
 #define CONFIG_SYS_PCIE_MEM_SIZE        0x80000000      /* 128M */
 
 #define CONFIG_NET_MULTI
-#define CONFIG_PCI_PNP
 #define CONFIG_PCI_SCAN_SHOW
 #define CONFIG_CMD_PCI