X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fliteboard.h;h=5adbe1ca3916ab8cb719d633dd23cfca00eba2be;hb=5a1a8a63be8f7262a300eddafb18020926b12fb6;hp=016d54f138c53d56235615fcf0236f3639d15a26;hpb=380e86f361e4e2aef83295972863654fde157560;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h index 016d54f..5adbe1c 100644 --- a/include/configs/liteboard.h +++ b/include/configs/liteboard.h @@ -1,16 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (C) 2015 Freescale Semiconductor, Inc. * Copyright (C) 2016 Grinn * * Configuration settings for the Grinn liteBoard (i.MX6UL). - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __LITEBOARD_CONFIG_H #define __LITEBOARD_CONFIG_H #include #include +#include #include "mx6_common.h" /* SPL options */ @@ -19,13 +19,11 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) -#define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configs */ #ifdef CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR -#define CONFIG_SUPPORT_EMMC_BOOT #endif #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 @@ -106,16 +104,11 @@ "else run netboot; fi" /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_128M) #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 -#define CONFIG_CMDLINE_EDITING - /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM @@ -128,16 +121,10 @@ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* FLASH and environment organization */ -#define CONFIG_ENV_SIZE SZ_8K -#define CONFIG_ENV_IS_IN_MMC -#define CONFIG_ENV_OFFSET (8 * SZ_64K) -#define CONFIG_SYS_MMC_ENV_DEV 0 -#define CONFIG_SYS_MMC_ENV_PART 0 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_USB_STORAGE #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 @@ -146,18 +133,12 @@ #ifdef CONFIG_CMD_NET #define CONFIG_FEC_MXC -#define CONFIG_MII #define CONFIG_FEC_ENET_DEV 0 #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x0 #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_ETHPRIME "FEC" - -#define CONFIG_PHYLIB -#define CONFIG_PHY_SMSC #endif -#define CONFIG_IMX_THERMAL - #endif