X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fimx8ulp_evk.h;h=592df2795b13f0e6626766b213c48362f6ca8141;hb=aa6e94deabb45154cea07ad44c4a5c047bca078b;hp=8e9a159e9b3776167a18a6f25a2812e6f0332c73;hpb=6eecaf5d0f6b9a500dd5798f1f2bc8296bcfe158;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index 8e9a159..592df27 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -9,44 +9,19 @@ #include #include -#define CONFIG_SYS_BOOTM_LEN (SZ_64M) -#define CONFIG_SPL_MAX_SIZE (148 * 1024) -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" -#define CONFIG_SPL_STACK 0x22050000 -#define CONFIG_SPL_BSS_START_ADDR 0x22048000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ -#define CONFIG_SYS_SPL_MALLOC_START 0x22040000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x8000 /* 32 KB */ - #define CONFIG_MALLOC_F_ADDR 0x22040000 -#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x95000000 /* SPL_RAM needed */ - -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ #endif -#define CONFIG_REMAKE_ELF - -#define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_BOARD_LATE_INIT - /* ENET Config */ #if defined(CONFIG_FEC_MXC) -#define CONFIG_ETHPRIME "FEC" #define PHY_ANEG_TIMEOUT 20000 -#define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_FEC_MXC_PHYADDR 1 - -#define IMX_FEC_BASE 0x29950000 #endif #ifdef CONFIG_DISTRO_DEFAULTS @@ -70,30 +45,19 @@ "fdtfile=imx8ulp-evk.dtb\0" \ "initrd_addr=0x83800000\0" \ "bootm_size=0x10000000\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ - "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ + "mmcpart=1\0" \ + "mmcroot=/dev/mmcblk2p2 rootwait rw\0" \ /* Link Definitions */ #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) -#define CONFIG_ENV_OVERWRITE -#define CONFIG_MMCROOT "/dev/mmcblk2p2" -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM 0x80000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ -/* Monitor Command Prompt */ -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#define CONFIG_SYS_CBSIZE 2048 -#define CONFIG_SYS_MAXARGS 64 -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) - /* Using ULP WDOG for reset */ #define WDOG_BASE_ADDR WDG3_RBASE #endif