X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fimx8mq_phanbell.h;h=1905e538c5befe1f1fac99dbb44e6fe51c036fde;hb=6cc04547cb3bbd3a3d78947f200acbae19e3c67f;hp=945e2cb35b3af5e452f6b3103f179259f6860a70;hpb=df6cf3d809fe543651e6bdf133baaa8b9841fe0f;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index 945e2cb..1905e53 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -9,61 +9,19 @@ #include #include -#define CONFIG_SPL_MAX_SIZE (172 * 1024) -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 - #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -#define CONFIG_SPL_WATCHDOG -#define CONFIG_SPL_DRIVERS_MISC -#define CONFIG_SPL_POWER -#define CONFIG_SPL_I2C -#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" -#define CONFIG_SPL_STACK 0x187FF0 -#define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_LIBGENERIC_SUPPORT -#define CONFIG_SPL_GPIO -#define CONFIG_SPL_MMC_SUPPORT -#define CONFIG_SPL_BSS_START_ADDR 0x00180000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */ #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x182000 /* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE - -#undef CONFIG_DM_MMC -#undef CONFIG_DM_PMIC -#undef CONFIG_DM_PMIC_PFUZE100 - -#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG - -#define CONFIG_POWER -#define CONFIG_POWER_I2C #endif -#define CONFIG_REMAKE_ELF - /* ENET Config */ /* ENET1 */ #if defined(CONFIG_CMD_NET) -#define CONFIG_MII -#define CONFIG_ETHPRIME "FEC" - -#define CONFIG_FEC_MXC -#define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 0 -#define FEC_QUIRK_ENET_MAC - -#define CONFIG_PHY_GIGE -#define IMX_FEC_BASE 0x30BE0000 - -#define CONFIG_PHYLIB #endif #define CONFIG_MFG_ENV_SETTINGS \ @@ -83,8 +41,8 @@ "initrd_addr=0x43800000\0" \ "initrd_high=0xffffffffffffffff\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ - "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ + "mmcpart=1\0" \ + "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \ "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ @@ -124,59 +82,19 @@ "booti; " \ "fi;\0" -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else booti ${loadaddr} - ${fdt_addr}; fi" - /* Link Definitions */ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) -#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */ -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ - (PHYS_SDRAM_SIZE >> 1)) +#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) -#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR - -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_SYS_MAXARGS 64 -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) - -#define CONFIG_IMX_BOOTAUX - -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 - -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 - -#define CONFIG_MXC_GPIO - -#define CONFIG_OF_SYSTEM_SETUP - -#ifndef CONFIG_SPL_BUILD -#define CONFIG_DM_PMIC -#endif +#define CFG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #endif