X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fimx8mq_evk.h;h=b564f3831e8c6623b6b46c3938f79b5a4aeb1014;hb=5fdb3c0e7ee6bac6b8809ae69e52f16d22d45035;hp=e4fa2df34253849466dbdb03dc15eaa4dbfb41dd;hpb=b9625abe03452f3926afa4308bf25c361af9c0ef;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index e4fa2df..b564f38 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -7,12 +7,9 @@ #define __IMX8M_EVK_H #include +#include #include -#ifdef CONFIG_SECURE_BOOT -#define CONFIG_CSF_SIZE 0x2000 /* 8K region */ -#endif - #define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR @@ -61,22 +58,9 @@ #define CONFIG_REMAKE_ELF -#define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_BOARD_LATE_INIT - -#undef CONFIG_CMD_EXPORTENV -#undef CONFIG_CMD_IMPORTENV -#undef CONFIG_CMD_IMLS - -#undef CONFIG_CMD_CRC32 -#undef CONFIG_BOOTM_NETBSD - /* ENET Config */ /* ENET1 */ #if defined(CONFIG_CMD_NET) -#define CONFIG_CMD_PING -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_MII #define CONFIG_MII #define CONFIG_ETHPRIME "FEC" @@ -87,9 +71,6 @@ #define CONFIG_PHY_GIGE #define IMX_FEC_BASE 0x30BE0000 - -#define CONFIG_PHYLIB -#define CONFIG_PHY_ATHEROS #endif #define CONFIG_MFG_ENV_SETTINGS \ @@ -108,11 +89,11 @@ CONFIG_MFG_ENV_SETTINGS \ "script=boot.scr\0" \ "image=Image\0" \ - "console=ttymxc0,115200 earlycon=ec_imx6q,0x30860000,115200\0" \ + "console=ttymxc0,115200\0" \ "fdt_addr=0x43000000\0" \ "fdt_high=0xffffffffffffffff\0" \ "boot_fdt=try\0" \ - "fdt_file=fsl-imx8mq-evk.dtb\0" \ + "fdt_file=imx8mq-evk.dtb\0" \ "initrd_addr=0x43800000\0" \ "initrd_high=0xffffffffffffffff\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ @@ -182,8 +163,6 @@ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_ENV_OVERWRITE -#define CONFIG_ENV_OFFSET (64 * SZ_64K) -#define CONFIG_ENV_SIZE 0x1000 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ @@ -194,12 +173,6 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */ -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ - (PHYS_SDRAM_SIZE >> 1)) - -#define CONFIG_BAUDRATE 115200 - #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR @@ -215,10 +188,6 @@ #define CONFIG_IMX_BOOTAUX -#define CONFIG_CMD_MMC -#define CONFIG_FSL_ESDHC -#define CONFIG_FSL_USDHC - #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 @@ -226,8 +195,6 @@ #define CONFIG_MXC_GPIO -#define CONFIG_CMD_FUSE - /* I2C Configs */ #define CONFIG_SYS_I2C_SPEED 100000