X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fimx8mp_evk.h;h=c6e3b105a8ad84c2d757a788f65f9b5cb0716d64;hb=0613c36a7a5973d58a50b764ee647099e80cc97d;hp=ba059f7d68b3515f331d9cccf155264ae440e808;hpb=6600b355c71e80c99d8edb8603dd5e3df8ed4db8;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h
index ba059f7..c6e3b10 100644
--- a/include/configs/imx8mp_evk.h
+++ b/include/configs/imx8mp_evk.h
@@ -10,41 +10,23 @@
 #include <linux/stringify.h>
 #include <asm/arch/imx-regs.h>
 
-#define CONFIG_SYS_BOOTM_LEN		(32 * SZ_1M)
-
-#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
-#define CONFIG_SYS_UBOOT_BASE	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
-
-#ifdef CONFIG_SPL_BUILD
-/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
-#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K	/* 512 KB */
-
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
-
-#define CONFIG_POWER_PCA9450
-
-#endif
+#define CFG_SYS_UBOOT_BASE	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
 
 #if defined(CONFIG_CMD_NET)
 #define CONFIG_FEC_MXC_PHYADDR          1
 
-#define DWC_NET_PHYADDR			1
-
 #define PHY_ANEG_TIMEOUT 20000
 
 #endif
 
-#ifndef CONFIG_SPL_BUILD
 #define BOOT_TARGET_DEVICES(func) \
        func(MMC, mmc, 1) \
        func(MMC, mmc, 2)
 
 #include <config_distro_bootcmd.h>
-#endif
 
 /* Initial environment variables */
-#define CONFIG_EXTRA_ENV_SETTINGS		\
+#define CFG_EXTRA_ENV_SETTINGS		\
 	BOOTENV \
 	"scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
 	"kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
@@ -60,17 +42,13 @@
 
 /* Link Definitions */
 
-#define CONFIG_SYS_INIT_RAM_ADDR	0x40000000
-#define CONFIG_SYS_INIT_RAM_SIZE	0x80000
+#define CFG_SYS_INIT_RAM_ADDR	0x40000000
+#define CFG_SYS_INIT_RAM_SIZE	0x80000
 
 
-/* Totally 6GB DDR */
-#define CONFIG_SYS_SDRAM_BASE		0x40000000
+/* Totally 2GB DDR */
+#define CFG_SYS_SDRAM_BASE		0x40000000
 #define PHYS_SDRAM			0x40000000
-#define PHYS_SDRAM_SIZE			0xC0000000	/* 3 GB */
-#define PHYS_SDRAM_2			0x100000000
-#define PHYS_SDRAM_2_SIZE		0xC0000000	/* 3 GB */
-
-#define CONFIG_MXC_UART_BASE		UART_BASE_ADDR(2)
+#define PHYS_SDRAM_SIZE			0x80000000
 
 #endif