X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fimx31_phycore.h;h=0a8501bd5cfaf9ffc78e5d48f69fd1f1f0e31a79;hb=8f1a80e99e4a838d1540cdb1d59ccc7785fe4618;hp=54e8121008e6ab7b5a03399b9fc454a6ff8f409f;hpb=1254ff97abb7606ccd0d7bdcd9f22581c50fe535;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h index 54e8121..0a8501bd 100644 --- a/include/configs/imx31_phycore.h +++ b/include/configs/imx31_phycore.h @@ -18,11 +18,6 @@ #define CONFIG_MX31 /* This is a mx31 */ #define CONFIG_MX31_CLK32 32000 -#define CONFIG_SYS_GENERIC_BOARD - -#define CONFIG_DISPLAY_CPUINFO -#define CONFIG_DISPLAY_BOARDINFO - #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG @@ -38,6 +33,8 @@ #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ +#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ #define CONFIG_SYS_I2C_CLK_OFFSET I2C2_CLK_OFFSET @@ -47,16 +44,11 @@ /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_CONS_INDEX 1 -#define CONFIG_BAUDRATE 115200 /*********************************************************** * Command definition ***********************************************************/ -#define CONFIG_CMD_PING -#define CONFIG_CMD_EEPROM -#define CONFIG_CMD_I2C -#define CONFIG_BOOTDELAY 3 #define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:128k(uboot)ro," \ "1536k(kernel),-(root)" @@ -93,7 +85,6 @@ "pclk:185925,le:9,ri:17,up:7,lo:10,hs:1,vs:1," \ "sync:1241513985,vmode:0\0" - #define CONFIG_SMC911X #define CONFIG_SMC911X_BASE 0xa8000000 #define CONFIG_SMC911X_32_BIT @@ -102,7 +93,6 @@ * Miscellaneous configurable options */ #define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "uboot> " /* Console I/O Buffer Size */ #define CONFIG_SYS_CBSIZE 256 /* Print Buffer Size */ @@ -126,7 +116,6 @@ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) -#define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_SYS_TEXT_BASE 0xA0000000 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 @@ -146,7 +135,6 @@ /* Monitor at beginning of flash */ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_ENV_IS_IN_EEPROM #define CONFIG_ENV_OFFSET 0x00 /* env. starts here */ #define CONFIG_ENV_SIZE 4096 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 @@ -172,30 +160,20 @@ /* * JFFS2 partitions */ -#undef CONFIG_CMD_MTDPARTS #define CONFIG_JFFS2_DEV "nor0" /* EET platform additions */ -#ifdef CONFIG_IMX31_PHYCORE_EET -#define CONFIG_BOARD_LATE_INIT - +#ifdef CONFIG_TARGET_IMX31_PHYCORE_EET #define CONFIG_MXC_GPIO #define CONFIG_HARD_SPI #define CONFIG_MXC_SPI -#define CONFIG_CMD_SPI #define CONFIG_S6E63D6 -#define CONFIG_VIDEO -#define CONFIG_CFB_CONSOLE #define CONFIG_VIDEO_MX3 #define CONFIG_VIDEO_LOGO -#define CONFIG_VIDEO_SW_CURSOR -#define CONFIG_VGA_AS_SINGLE_DEVICE -#define CONFIG_SYS_CONSOLE_IS_IN_ENV #define CONFIG_SPLASH_SCREEN -#define CONFIG_CMD_BMP #define CONFIG_BMP_16BPP #endif