X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fimx31_phycore.h;h=0a66720a7d23e02e4fe4a2430293873d80fc67c6;hb=cb33bda44f4bbf6fb58adf41dced313ca38da6fc;hp=720e1bf407144d4d573d1530387f645a7c49c004;hpb=3be2bdf5dc69b3142c1162a59bc67191c9077567;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h index 720e1bf..0a66720 100644 --- a/include/configs/imx31_phycore.h +++ b/include/configs/imx31_phycore.h @@ -6,7 +6,7 @@ * * Configuration settings for the phyCORE-i.MX31 board. * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H @@ -15,13 +15,9 @@ #include /* High Level Configuration Options */ -#define CONFIG_ARM1136 /* This is an arm1136 CPU core */ -#define CONFIG_MX31 /* in a mx31 */ +#define CONFIG_MX31 /* This is a mx31 */ #define CONFIG_MX31_CLK32 32000 -#define CONFIG_DISPLAY_CPUINFO -#define CONFIG_DISPLAY_BOARDINFO - #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG @@ -35,11 +31,12 @@ * Hardware drivers */ -#define CONFIG_HARD_I2C -#define CONFIG_I2C_MXC -#define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ +#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ +#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ #define CONFIG_SYS_I2C_CLK_OFFSET I2C2_CLK_OFFSET -#define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE @@ -47,19 +44,12 @@ /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_CONS_INDEX 1 -#define CONFIG_BAUDRATE 115200 /*********************************************************** * Command definition ***********************************************************/ - -#include - -#define CONFIG_CMD_PING #define CONFIG_CMD_EEPROM -#define CONFIG_CMD_I2C -#define CONFIG_BOOTDELAY 3 #define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:128k(uboot)ro," \ "1536k(kernel),-(root)" @@ -96,7 +86,6 @@ "pclk:185925,le:9,ri:17,up:7,lo:10,hs:1,vs:1," \ "sync:1241513985,vmode:0\0" - #define CONFIG_SMC911X #define CONFIG_SMC911X_BASE 0xa8000000 #define CONFIG_SMC911X_32_BIT @@ -105,7 +94,6 @@ * Miscellaneous configurable options */ #define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "uboot> " /* Console I/O Buffer Size */ #define CONFIG_SYS_CBSIZE 256 /* Print Buffer Size */ @@ -121,8 +109,6 @@ #define CONFIG_SYS_LOAD_ADDR 0 /* default load address */ -#define CONFIG_SYS_HZ 1000 - #define CONFIG_CMDLINE_EDITING /* @@ -131,7 +117,6 @@ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) -#define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_SYS_TEXT_BASE 0xA0000000 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 @@ -181,26 +166,17 @@ #define CONFIG_JFFS2_DEV "nor0" /* EET platform additions */ -#ifdef CONFIG_IMX31_PHYCORE_EET -#define CONFIG_BOARD_LATE_INIT - +#ifdef CONFIG_TARGET_IMX31_PHYCORE_EET #define CONFIG_MXC_GPIO #define CONFIG_HARD_SPI #define CONFIG_MXC_SPI -#define CONFIG_CMD_SPI #define CONFIG_S6E63D6 -#define CONFIG_VIDEO -#define CONFIG_CFB_CONSOLE #define CONFIG_VIDEO_MX3 #define CONFIG_VIDEO_LOGO -#define CONFIG_VIDEO_SW_CURSOR -#define CONFIG_VGA_AS_SINGLE_DEVICE -#define CONFIG_SYS_CONSOLE_IS_IN_ENV #define CONFIG_SPLASH_SCREEN -#define CONFIG_CMD_BMP #define CONFIG_BMP_16BPP #endif